lh28f008sc Sharp Microelectronics of the Americas, lh28f008sc Datasheet - Page 24

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lh28f008sc

Manufacturer Part Number
lh28f008sc
Description
8m 1m ? 8 Flash Memory
Manufacturer
Sharp Microelectronics of the Americas
Datasheet

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LH28F008SC
DC CHARACTERISTICS (Continued)
NOTES:
1. All currents are in RMS unless otherwise noted. These currents are valid for all product versions (packages and speeds). Contact
2. I
3. Includes RY
4. Block erases, byte writes, and lock-bit configurations are inhibited when V
5. Automatic Power Savings (APS) reduces typical I
6. CMOS inputs are either V
7. Sampled, but not 100% tested.
8. Master lock-bit set operations are inhibited when RP
24
V
V
V
V
SYM.
V
V
V
V
V
V
PPH
PPH
PPH
V
PPLK
SHARP’s Application Support Hotline or your local sales office for information about typical specifications.
draw is the sum of I
(MAX.) and V
bit is set and RP
Block erase, byte write, and lock-bit configuration operations are not guaranteed with V
OH
OH
LKO
CCWS
HH
OL
IH
IL
1
2
1
2
3
and I
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
(TTL)
Output High Voltage
(CMOS)
V
Normal Operations
V
Block Erase, or Lock-
Bit Operations
V
Block Erase, or Lock-
Bit Operations
V
Block Erase, or Lock-
Bit Operations
V
RP
PP
PP
PP
PP
CC
»
CCES
    »
Unlock Voltage
/ BY
Lockout during
during Byte Write,
during Byte Write,
during Byte Write,
Lockout Voltage
PPH
PARAMETER
    »
.
    »
1
are specified with the device de-selected. If read or byte written while in erase suspend mode, the device’s current
= V
(MIN.), between V
CCWS
IH
. Block erases and byte writes are inhibited when the corresponding block-lock bit is set and RP
or I
CC
± 0.2 V or GND ± 0.2 V. TTL inputs are either V
CCES
and I
PPH
0.85 V
V
CC
CCR
1
MIN.
11.4
11.4
(MAX.) and V
-0.5
2.4
3.0
4.5
2.0
2.0
V
- 0.4
or I
CC
CC
CCW
= 3.3 V
CCR
V
, respectively.
    »
CC
= V
to 1mA at 5 V V
MAX.
PPH
12.6
12.6
1.5
0.8
0.4
3.6
5.5
+ 0.5
IH
2
. Block lock-bit configuration operations are inhibited when the master lock
(MIN.), between V
0.85 V
V
CC
MIN.
11.4
11.4
-0.5
2.0
2.4
4.5
2.0
CC
- 0.4
V
CC
and 3 mA at 3.3 V V
CC
PP
IL
= 5 V
PPH
or V
V
V
PPLK
CC
2
MAX.
12.6
IH
0.45
12.6
1.5
5.5
0.8
(MAX.) and V
.
+ 0.5
, and not guaranteed in the range between V
IH
< RP
UNIT
CC
V
V
V
    »
V
V
V
V
V
V
V
V
V
< V
in static operation.
PPH
HH
3
V
I
V
I
V
I
V
I
Set Master Lock-Bit
Override Master and
Block Lock-Bit
TEST CONDITIONS
.
8M (1M × 8) Flash Memory
(MIN.), and above V
OL
OH
OH
OH
CC
CC
CC
CC
= 5.8 mA
= 2.5 mA
= 2.5 µA
= 100 µA
= V
= V
= V
= V
CC
CC
CC
CC
MIN.,
MIN.,
MIN.,
MIN.,
    »
= V
PPH
IH
.
3
(MAX.).
NOTE
3, 7
3, 7
4, 7
PPLK
7
8
7

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