tmp88cs34ng TOSHIBA Semiconductor CORPORATION, tmp88cs34ng Datasheet - Page 111
tmp88cs34ng
Manufacturer Part Number
tmp88cs34ng
Description
Cmos 8-bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88CS34NG.pdf
(215 pages)
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Remote control receive control register 1
Remote control receive control register 2
RXCR1
(00FE8H)
RXCR2
(00FE9H)
Note 1: fc: High-frequency clock [Hz]
Note 2: After reset, RPOLS do not change the set value in the receiving remote control signal. For setting interrupt
Note 1: fc: High-frequency clock [Hz]
Note 2: When an interrupt source is set for rising/falling edge, low and high widths are forcibly measured
Note 3: Set CREGA (0H to FH) before EINT sets to 8-bit receive end.
RMCEN
CREGA
RPOLS
RCCK
EINT
RMM
RNC
RCS
7
7
RCCK
edge and measurement data, use EINT and RMM.
separately.
8-bit up-counter source clock
select
Remote control signal polarity
select
Interrupt source select
Noise canceler noise
eliminating time select
Setting of detect time for
match with 8-bit up-counter
upper 4 bits
8-bit up-counter start control
Remote control signal
preprocesser Enable/Disable
Measurement mode select
(invalid when EINT = “10”)
6
6
Figure 2.10.2 Remote Control Receive Control Register 1, 2
CREGA
RPOLS
5
5
4
4
EINT
RCS
3
3
88CS34-111
Match detect time (Tth) = 16 × CREGA/RCCK [s]
Example: CREGA = 2H, RCCK = fc/2
001: 2
010: 2
011: 2
100: 2
101: 2
110: 2
111: 2
000: Noise canceler disable
RMCEN
00: fc/2
01: fc/2
10: fc/2
11: fc/2
0: Positive
1: Negative
00: Rising edge
01: Falling edge (at RPOLS = 0)
10: Rising/Falling edge
11: 8-bit receive end
0: Stop and counter clear
1: Start
0: Disable
1: Enable
00:
01:
10:
11:
CREGA = 0H to FH
Tth = 128 [μs]
2
2
2
5
6
7
8
10
11
/fc × 7 − 1/fc (s)
/fc × 7 − 1/fc
/fc × 7 − 1/fc
/fc × 7 − 1/fc
/fc × 7 − 1/fc
/fc × 7 − 1/fc
/fc × 7 − 1/fc
6
8
10
12
(Hz)
DV1CK = 0
RNC
1
1
Refer to Table 2.10.1
RMM
0
0
(Initial value: 0000 0000)
(Initial value: 0000 0000)
6
[Hz], at fc = 16 MHz,
TMP88CS34/CP34
2007-09-12
R/W
R/W
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