tmp88cs34ng TOSHIBA Semiconductor CORPORATION, tmp88cs34ng Datasheet - Page 13

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tmp88cs34ng

Manufacturer Part Number
tmp88cs34ng
Description
Cmos 8-bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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System Control Register 1
System Control Register 2
(00038H)
(00039H)
SYSCR1
SYSCR2
Note 1: Always set bit 5 in SYSCR1 to “0”.
Note 2: When STOP mode is released with
Note 3: fc: High-frequency clock [Hz]
Note 4: Bits 1 and 0 in SYSCR1 are read in as undefined data when a read instruction is executed.
Note 5: Always set bit 4 in SYSCR1 to “1” when STOP mode is started.
Note 1: *: Don’t care
Note 2: Always set bit 7, 6 and 5 in SYSCR2 to “100”.
STOP
“1”
IDLE
7
7
STOP
RELM
WUT
RETM contents.
*: Don’t care
RELM
“0”
IDLE mode start
6
6
Release method for STOP mode
Warming-up time at releasing
STOP mode
STOP mode start
“0”
“0”
5
5
Figure 1.4.8 System Control Registers
IDLE
“1”
4
4
3
3
88CS34-13
0: CPU and watchdog timer remain active
1: CPU and watchdog timer are stopped (start IDLE mode)
WUT
RESET
2
0: CPU core and peripherals remain active
1: CPU core and peripherals are halted
0: Edge-sensitive release (Rising Edge)
1: Level-sensitive release (“H” Level)
2
pin input, a return is made to NORMAL mode regardless of the
00
01
10
11
(start STOP mode)
1
1
3 × 2
DV1CK = 0
Reserved
Reserved
2
Return to NORMAL mode
16
0
16
0
/fc
/fc
(Initial value: 0000 00** )
(Initial value: 1000 **** )
3 × 2
DV1CK = 1
Reserved
Reserved
TMP88CS34/CP34
2
17
17
/fc
/fc
2007-09-12
R/W
R/W

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