tmp88cs34ng TOSHIBA Semiconductor CORPORATION, tmp88cs34ng Datasheet - Page 155

• Manufacturer Part Number: tmp88cs34ng
• Description: Cmos 8-bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Note 1: T
Note 2: The data written to these control registers is transmitted to OSD circuit by setting RGWR
Note 3: If display lines are overlapped each other, previous display line is enabled and next line is disabled.
Note 4: The line which is displayed off is managed as a small size character line.
Note 5: Transfer the contents of vertical display start position registers into OSD circuit before the position of
2.14.6.3 Display Position Control
(bit 2 in ORDON) to “1”.
If vertical display start positions of two or more lines are set on same value, high priority line is
enabled. Lines of OSD (VS1 to VS12) are fixed priority levels as follows:
Set the vertical display start position not to overlap display lines.
the scanning line coincides with their own vertical display start position.
HD
VS2 (display canceled, middle character)
(1) Code display position setting
; One cycle of
VS1 > VS2 > VS3 >……> VS12
1.
2.
VS5 (display on, small character)
VS3 (display on, small character)
Horizontal display start position
control registers HS17 to HS10 (bit 7 to 0 in ORHS1). The value is in common with
all lines.
Vertical display start position
625 steps by writing to VSn9 to VSn0 (in ORVSn (n; 1 to 12)).
The horizontal display start position can be set in 256 steps by writing to OSD
The vertical display start position can be specified for each display line using
Specification unit: 2 T
Specification steps: 256
Specification horizontal display start position: Line 1 to 12: HS17 to HS10
(ORHS1)
Note 1: T
Note 2: The data written to these control registers is transmitted to OSD circuit by
Specification unit: 1 scan line
Specification steps: 512
Specification vertical display start position:
HD
signal.
HS1 = (HS17 to HS10) H × 2T
Line1: VS19 to VS10 (ORVS 1)
Line2: VS29 to VS20 (ORVS 2)
Line12: VS129 to VS120 (ORVS 12)
Line n: VSn = (VSn9 to VSn0) H × 1T
setting RGWR (bit 2 in ORDON) to “1”.
. .
.
OSC
; One cycle of OSD oscillation.
88CS34-155
OSC
Occasion of overlapping
OSC
+ 22T
HD
OSC
(n; 1 to 12)
(Line1 to 12)
TMP88CS34/CP34
2007-09-12