tmp88cs34ng TOSHIBA Semiconductor CORPORATION, tmp88cs34ng Datasheet - Page 37

• Manufacturer Part Number: tmp88cs34ng
• Description: Cmos 8-bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

ROM Corrective Control Register
ROM Corrective Status Register
ROM Corrective Data Register
ROMCCR
ROMCDR
ROMCSR
(00FE0H)
(00FE1H)
(00FE2H)
1.7.2
Figure 1.7.2 ROM Corrective Control Register, Status Register and ROM Corrective Data Register
(1) Enable and disable
(2) Data replacement mode
(3) The ROM corrective data register writing
the data for one bank into ROMCDR. And the address-trap-reset is not generated when
fetching an instruction from the RAM area except the address 02C0H to 06BFH.
in order to disable it.
mode.
locations to patch. The write data counter (WDC) points each bank set. (Figure 1.7.2)
Control
and ROM corrective data register (ROMCDR).
ROMC
WDC
7
−
CM3
CM2
CM1
CM0
7
−
7
The ROM corrective function is disabled after releasing reset. It is enabled after setting
After the ROM corrective function is enabled, it is neccesary to reset the micro controller
The ROM corrective function has the program jump mode and the data replacement
By setting CMx (x: 0 to 3) in ROMCCR, the data replacement mode is selected.
The ROM corrective data register has four banks corresponding to four independent
The ROM corrective function is controlled by ROM corrective control register (ROMCCR)
Corrective mode setting
(BANK3)
Corrective mode setting
(BANK2)
Corrective mode setting
(BANK1)
Corrective mode setting
(BANK0)
6
−
6
−
Write data counter
6
ROM Corrective data register
5
−
5
−
5
4
−
4
4
CM3
3
3
3
88CS34-37
0: Program jump mode
1: Data replacement mode
Counting the number of the byte written in ROMCDR
WDC
CM2
2
2
2
CM1
1
1
1
CM0
0
0
0
(Initial value: **** 0000)
(Initial value: ***0 0000)
(Initial value: 0000 0000)
TMP88CS34/CP34
2007-09-12
Read
R/W
Write
only
only