AT91SAM7A3-AU Atmel, AT91SAM7A3-AU Datasheet - Page 285
![IC ARM7 MCU FLASH 256K 100LQFP](/photos/6/76/67646/313-100-lqfp_sml.jpg)
AT91SAM7A3-AU
Manufacturer Part Number
AT91SAM7A3-AU
Description
IC ARM7 MCU FLASH 256K 100LQFP
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7A3-AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
60MHz
Connectivity
CAN, I²C, MMC, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
62
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
AT91SAM7xx
No. Of I/o's
62
Ram Memory Size
32KB
Cpu Speed
60MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
60 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
62
Interface Type
CAN/SPI/I2S/TWI/USART/USB
On-chip Adc
2(8-chx10-bit)
Number Of Timers
3
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Ram Size
32 KB
Maximum Clock Frequency
60 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7A3-EK
Minimum Operating Temperature
- 40 C
Cpu Family
91S
Device Core Size
32b
Frequency (max)
60MHz
Total Internal Ram Size
32KB
# I/os (max)
62
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7A3-EK - KIT EVAL FOR AT91SAM7A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7A3-AU
Manufacturer:
MXIC
Quantity:
1 001
Company:
Part Number:
AT91SAM7A3-AU
Manufacturer:
Atmel
Quantity:
730
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29.5.3.5
6042E–ATARM–14-Dec-06
Parity
The USART supports five parity modes selected by programming the PAR field in the Mode
Register (US_MR). The PAR field also enables the Multidrop mode, see
page
If even parity is selected, the parity generator of the transmitter drives the parity bit at 0 if a
number of 1s in the character data bit is even, and at 1 if the number of 1s is odd. Accordingly,
the receiver parity checker counts the number of received 1s and reports a parity error if the
sampled parity bit does not correspond. If odd parity is selected, the parity generator of the
transmitter drives the parity bit at 1 if a number of 1s in the character data bit is even, and at 0
if the number of 1s is odd. Accordingly, the receiver parity checker counts the number of
received 1s and reports a parity error if the sampled parity bit does not correspond. If the mark
parity is used, the parity generator of the transmitter drives the parity bit at 1 for all characters.
The receiver parity checker reports an error if the parity bit is sampled at 0. If the space parity
is used, the parity generator of the transmitter drives the parity bit at 0 for all characters. The
receiver parity checker reports an error if the parity bit is sampled at 1. If parity is disabled, the
transmitter does not generate any parity bit and the receiver does not report any parity error.
Table 29-6
depending on the configuration of the USART. Because there are two bits at 1, 1 bit is added
when a parity is odd, or 0 is added when a parity is even.
Table 29-6.
When the receiver detects a parity error, it sets the PARE (Parity Error) bit in the Channel Sta-
tus Register (US_CSR). The PARE bit can be cleared by writing the Control Register (US_CR)
with the RSTSTA bit at 1.
Character
286. Even and odd parity bit generation and error detection are supported.
A
A
A
A
A
shows an example of the parity bit for the character 0x41 (character ASCII “A”)
Parity Bit Examples
Hexa
0x41
0x41
0x41
0x41
0x41
Figure 29-11
illustrates the parity bit status setting and clearing.
0100 0001
0100 0001
0100 0001
0100 0001
0100 0001
Binary
AT91SAM7A3 Preliminary
Parity Bit
None
1
0
1
0
”Multidrop Mode” on
Parity Mode
Space
None
Even
Mark
Odd
285
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