AT91SAM9XE128-QU Atmel, AT91SAM9XE128-QU Datasheet - Page 855

• Manufacturer Part Number: AT91SAM9XE128-QU
• Description: MCU ARM9 128K FLASH 208-PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9XE128-QU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6254C–ATARM–22-Jan-10
25 Error Corrected Code Controller (ECC) ............................................. 261
26 Peripheral DMA Controller (PDC) ....................................................... 303
27 Clock Generator ................................................................................... 315
28 Power Management Controller (PMC) ................................................ 320
24.5 Functional Description ......................................................................................244
24.6 SDRAM Controller (SDRAMC) User Interface .................................................251
25.1 Description .......................................................................................................261
25.2 Block Diagram ..................................................................................................261
25.3 Functional Description ......................................................................................261
25.4 Error Corrected Code Controller (ECC) User Interface ....................................266
25.5 Registers for 1 ECC for a page of 512/1024/2048/4096 bytes ........................277
25.6 Registers for 1 ECC per 512 bytes for a page of 512/2048/4096 bytes,
25.7 Registers for 1 ECC per 256 bytes for a page of 512/2048/4096 bytes,
26.1 Description .......................................................................................................303
26.2 Block Diagram ..................................................................................................304
26.3 Functional Description ......................................................................................304
26.4 Peripheral DMA Controller (PDC) User Interface .............................................307
27.1 Description .......................................................................................................315
27.2 Clock Generator Block Diagram .......................................................................315
27.3 Slow Clock Crystal Oscillator ...........................................................................315
27.4 Slow Clock RC Oscillator .................................................................................316
27.5 Slow Clock Selection ........................................................................................316
27.6 Main Oscillator .................................................................................................316
27.7 Divider and PLL Block ......................................................................................318
28.1 Description .......................................................................................................320
28.2 Master Clock Controller ....................................................................................321
28.3 Processor Clock Controller ..............................................................................321
28.4 USB Clock Controller .......................................................................................322
28.5 Peripheral Clock Controller ..............................................................................322
28.6 Programmable Clock Output Controller ...........................................................322
28.7 Programming Sequence ..................................................................................323
28.8 Clock Switching Details ....................................................................................328
28.9 Power Management Controller (PMC) User Interface ....................................332
8-bit word .......................................................................................................279
8-bit word .......................................................................................................287
AT91SAM9XE128/256/512 Preliminary
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