ADUC7129BSTZ126-RL Analog Devices Inc, ADUC7129BSTZ126-RL Datasheet - Page 58

• Manufacturer Part Number: ADUC7129BSTZ126-RL
• Description: IC DAS MCU ARM7 ADC/DDS 80-LQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7129BSTZ126-RL

• Core Size: 16/32-Bit
• Program Memory Size: 126KB (126K x 8)
• Core Processor: ARM7
• Speed: 41.78MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PLA, POR, PWM, PSM, Temp Sensor, WDT
• Number Of I /o: 38
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-LQFP
• Controller Family/series: (ARM7) ADUC
• No. Of I/o's: 40
• Cpu Speed: 41.78MHz
• No. Of Timers: 5
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: ADUC7129BSTZ126-RLTR

ADuC7128/ADuC7129
Table 77. UART Signal Descriptions
Pin
SPM0 (Mode 1)
SPM1 (Mode 1)
SPM2 (Mode 1)
SPM3 (Mode 1)
SPM4 (Mode 1)
SPM5 (Mode 1)
SPM6 (Mode 1)
SPM7 (Mode 1)
SPM8 (Mode 2)
SPM9 (Mode 2)
The serial communication adopts an asynchronous protocol
that supports various word-length, stop-bits, and parity
generation options selectable in the configuration register.
Baud Rate Generation
There are two ways of generating the UART baud rate: normal
450 UART baud rate generation and using the fractional divider.
Normal 450 UART Baud Rate Generation
The baud rate is a divided version of the core clock, using the
value in COM0DIV0 and COM0DIV1 MMRs (16-bit value, DL).
Table 78 gives some common baud rate values.
Table 78. Baud Rate Using the Normal Baud Rate Generator
Baud Rate
9600
19,200
115,200
9600
19,200
115,200
Using the Fractional Divider
The fractional divider combined with the normal baud rate
generator allows the generating of a wider range of more
accurate baud rates.
Baud
CLOCK
CORE
Rate
Figure 53. Baud Rate Generation Options
CD
0
0
0
3
3
3
/(M + N/2048)
=
2
/2
CD
Signal
SIN0
SOUT0
RTS0
CTS0
RI0
DCD0
DSR0
DTR0
SIN0
SOUT0
41
DL
0x88
0x44
0x0B
0x11
0x08
0x01
×
.
16
78
×
MHz
FBEN
2
Actual Baud Rate
9600
19,200
118,691
9600
20,400
163,200
×
Description
Serial Receive Data.
Serial Transmit Data.
Request to Send.
Clear to Send.
Ring Indicator.
Data Carrier Detect.
Data Set Ready.
Data Terminal Ready.
Serial Receive Data.
Serial Transmit Data.
DL
/16DL
UART
% Error
0%
0%
3%
0%
6.25%
41.67%
Rev. 0 | Page 58 of 92
Calculation of the baud rate using fractional divider is as
follows:
For example, generation of 19,200 bauds with CD bits = 3.
Table 78 gives DL = 0x08.
where:
M = 1
N = 0.06 × 2048 = 128
where:
Baud Rate = 19,200 bps.
Error = 0% compared to 6.25% with the normal baud rate
generator.
UART Register Definitions
The UART interface consists of 12 registers.
Table 79. UART MMRs
Register
COMxTX
COMxRX
COMxDIV0
COMxTX, COMxRX,
and COMxDIV0
COMxDIV1
COMxCON0
COMxSTA0
COMxIEN0
COMxIID0
COMxCON1
COMxSTA1
COMxDIV2
COMxSCR
M
M
Baud
M
Baud
+
+
+
2048
2048
2048
Rate
N
N
Rate
N
=
=
=
=
=
19200
. 1
2
Baud
06
2
CD
3
×
41
×
16
×
16
.
78
2
Rate
41
×
3
Description
8-Bit Transmit Register.
8-Bit Receive Register.
Divisor Latch (Low Byte).
Share The Same Address Location.
COMxTX and COMxRX can be
accessed when Bit 7 in COMxCON0
register is cleared. COMxDIV0 can
be accessed when Bit 7 of
COMxCON0 is set.
Divisor Latch (High Byte).
Line Control Register.
Line Status Register.
Interrupt Enable Register.
Interrupt Identification Register.
Modem Control Register.
Modem Status Register.
16-Bit Fractional Baud Divide Register.
8-Bit Scratch Register Used for
Temporary Storage. Also used in
network addressable UART mode.
×
8
×
MHz
.
41
78
41
×
16
DL
2
×
.
.
78
×
MHz
78
×
×
8
2
(
MHz
CD
×
2
MHz
2
2048
×
128
×
(
16
M
×
+
)
DL
2048
N
×
2
)