ADUC7129BSTZ126-RL Analog Devices Inc, ADUC7129BSTZ126-RL Datasheet - Page 83

• Manufacturer Part Number: ADUC7129BSTZ126-RL
• Description: IC DAS MCU ARM7 ADC/DDS 80-LQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7129BSTZ126-RL

• Core Size: 16/32-Bit
• Program Memory Size: 126KB (126K x 8)
• Core Processor: ARM7
• Speed: 41.78MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PLA, POR, PWM, PSM, Temp Sensor, WDT
• Number Of I /o: 38
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-LQFP
• Controller Family/series: (ARM7) ADUC
• No. Of I/o's: 40
• Cpu Speed: 41.78MHz
• No. Of Timers: 5
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: ADUC7129BSTZ126-RLTR

EXTERNAL MEMORY INTERFACING
The ADuC7129 is the only model in the series that features an
external memory interface. The external memory interface requires
a larger number of pins. This is why it is only available on larger
pin count packages. The XMCFG MMR must be set to 1 to use
the external port.
Although 32-bit addresses are supported internally, only the lower
16 bits of the address are on external pins.
The memory interface can address up to four 128 kB regions of
asynchronous memory (SRAM and/or EEPROM).
The pins required for interfacing to an external memory are
shown in Table 118.
Table 118. External Memory Interfacing Pins
Pin
AD[15:0]
A16
MS[3:0]
WR (WR)
RS (RS)
AE
BHE, BLE
There are four external memory regions available, as described
in Table 119. Associated with each region are the MS[3:0] pins.
These signals allow access to the particular region of external
memory. The size of each memory region can be 128 kB
maximum, 64 k × 16, or 128 k × 8. To access 128 kB with an
8-bit memory, an extra address line (A16) is provided. (See the
example in Figure 61). The four regions are configured inde-
pendently.
Table 119. Memory Regions
Address Start
0x10000000
0x20000000
0x30000000
0x40000000
Each external memory region can be controlled through three
MMRs: XMCFG, XMxCON, and XMxPAR.
Function
Address/Data Bus.
Extended Addressing for 8-Bit Memory Only.
Memory Select.
Write Strobe.
Read Strobe.
Address Latch Enable.
Byte Write Capability.
Address End
0x1000FFFF
0x2000FFFF
0x3000FFFF
0x4000FFFF
Contents
External Memory 0
External Memory 1
External Memory 2
External Memory 3
Rev. 0 | Page 83 of 92
XMCFG Register
Name
XMCFG
XMCFG is set to 1 to enable external memory access. This must
be set to 1 before any port pins function as external memory
access pins. The port pins must also be individually enabled via
the GPxCON MMR.
XMxCON Registers
Name
XM0CON
XM1CON
XM2CON
XM3CON
XMxCON registers are the control registers for each memory
region. They allow the enabling/disabling of a memory region
and control the data bus width of the memory region.
Table 120. XMxCON MMR Bit Designations
Bit
1
0
XMxPAR Registers
Name
XM0PAR
XM1PAR
XM2PAR
XM3PAR
Description
Data Bus Width Select.
Memory Region Enable.
Set by the user to select a 16-bit data bus.
Cleared by the user to select an 8-bit data bus.
Set by the user to enable memory region.
Cleared by the user to disable the memory region.
ADuC7128/
ADuC7129
Figure 61. Interfacing to External EPROM/RAM
AD15:0
Address
0xFFFFF000
Address
0xFFFFF010
0xFFFFF014
0xFFFFF018
0xFFFFF01C
Address
0xFFFFF020
0xFFFFF024
0xFFFFF028
0xFFFFF02C
MS0
MS1
A16
WS
AE
RS
LATCH
ADuC7128/ADuC7129
Default Value
0x00
Default Value
0x00
0x00
0x00
0x00
Default Value
0x70FF
0x70FF
0x70FF
0x70FF
D0 TO D15
A0:15
CS
WE
OE
D0 TO D7
A16
A0:15
CS
WE
OE
64k × 16-BIT
128k × 8-BIT
EPROM
RAM
Access
R/W
Access
R/W
R/W
R/W
R/W
Access
R/W
R/W
R/W
R/W