ADUC7129BSTZ126-RL Analog Devices Inc, ADUC7129BSTZ126-RL Datasheet - Page 64

• Manufacturer Part Number: ADUC7129BSTZ126-RL
• Description: IC DAS MCU ARM7 ADC/DDS 80-LQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7129BSTZ126-RL

• Core Size: 16/32-Bit
• Program Memory Size: 126KB (126K x 8)
• Core Processor: ARM7
• Speed: 41.78MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PLA, POR, PWM, PSM, Temp Sensor, WDT
• Number Of I /o: 38
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-LQFP
• Controller Family/series: (ARM7) ADUC
• No. Of I/o's: 40
• Cpu Speed: 41.78MHz
• No. Of Timers: 5
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: ADUC7129BSTZ126-RLTR

ADuC7128/ADuC7129
SPIRX Register
Name
SPIRX
SPIRX is an 8-bit read-only receive register.
SPITX Register
Name
SPITX
SPITX is an 8-bit write-only transmit register.
Table 91. SPICON MMR Bit Designations
Bit
15:13
12
11
10
9
8
7
6
5
4
3
2
1
0
Description
Reserved.
Continuous Transfer Enable.
Loopback Enable.
Slave Output Enable.
Slave Select Input Enable.
SPIRX Overflow Overwrite Enable.
SPITX Underflow Mode.
Transfer and Interrupt Mode (Master Mode).
LSB First Transfer Enable Bit.
Reserved. Should be set to 0.
Serial Clock Polarity Mode Bit.
Serial Clock Phase Mode Bit.
Master Mode Enable Bit.
SPI Enable Bit.
Set by user to enable continuous transfer. In master mode, the transfer continues until no valid data is available in the TX
register. CS is asserted and remains asserted for the duration of each 8-bit serial transfer until TX is empty.
Cleared by user to disable continuous transfer. Each transfer consists of a single 8-bit serial transfer. If valid data exists in the
SPITX register, then a new transfer is initiated after a stall period.
Set by user to connect MISO to MOSI and test software.
Cleared by user to be in normal mode.
Set by user to enable the slave output.
Cleared by user to disable slave output.
Set by user in master mode to enable the output.
Set by user, the valid data in the RX register is overwritten by the new serial byte received.
Cleared by user, the new serial byte received is discarded.
Set by user to transmit 0.
Cleared by user to transmit the previous data.
Set by user to initiate transfer with a write to the SPITX register. Interrupt occurs when TX is empty.
Cleared by user to initiate transfer with a read of the SPIRX register. Interrupt occurs when RX is full.
Set by user, the LSB is transmitted first.
Cleared by user, the MSB is transmitted first.
Set by user, the serial clock idles high.
Cleared by user, the serial clock idles low.
Set by user, the serial clock pulses at the beginning of each serial bit transfer.
Cleared by user, the serial clock pulses at the end of each serial bit transfer.
Set by user to enable master mode.
Cleared by user to enable slave mode.
Set by user to enable the SPI.
Cleared to disable the SPI.
Address
0xFFFF0A04
Address
0xFFFF0A08
Default Value
0x00
Default Value
0x00
Access
R
Access
W
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SPIDIV Register
Name
SPIDIV
SPIDIV is an 8-bit serial clock divider register.
SPICON Register
Name
SPICON
SPICON is a 16-bit control register.
Address
0xFFFF0A0C
Address
0xFFFF0A10
Default Value
0x1B
Default Value
0x0000
Access
R/W
Access
R/W