Z8F0431SJ020SG Zilog, Z8F0431SJ020SG Datasheet - Page 143

• Manufacturer Part Number: Z8F0431SJ020SG
• Description: IC ENCORE XP MCU FLASH 4K 28SOIC
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F0431SJ020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• For Use With: 770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Other names: 269-4627-5

PS025111-1207
Figure 22. Interfacing the On-Chip Debugger’s DBG Pin with an RS-232 Interface (2)
DEBUG Mode
The operating characteristics of the devices in DEBUG mode are:
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Entering DEBUG Mode
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Exiting DEBUG Mode
The device exits DEBUG mode following any of these operations:
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RS-232 TX
RS-232 RX
The eZ8 CPU fetch unit stops, idling the eZ8 CPU, unless directed by the OCD to execute
specific instructions.
The system clock operates, unless the device is in STOP mode.
All enabled on-chip peripherals operate, unless the device is in STOP mode.
Automatically exits HALT mode.
Constantly refreshes the Watchdog Timer, if enabled.
The device enters DEBUG mode after the eZ8 CPU executes a BRK (Breakpoint)
instruction
If the DBG pin is held low during the most recent clock cycle of system reset, the device
enters DEBUG mode on exiting system reset.
Clearing the DBGMODE bit in the OCD control register to 0
Power-On Reset
Voltage Brownout reset
Watchdog Timer reset
Transceiver
RS-232
Open-Drain
Buffer
VDD
10KOhm
Z8 Encore!
DBG Pin
Product Specification
®
On-Chip Debugger
F0830 Series
133