Z8F0431SJ020SG Zilog, Z8F0431SJ020SG Datasheet - Page 154
Z8F0431SJ020SG
Manufacturer Part Number
Z8F0431SJ020SG
Description
IC ENCORE XP MCU FLASH 4K 28SOIC
Manufacturer
Zilog
Series
Encore!®r
Specifications of Z8F0431SJ020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (7.5mm Width)
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
269-4627-5
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
Z8F0431SJ020SG
Manufacturer:
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Quantity:
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Table 93. Oscillator Configuration and Selection (Continued)
PS025111-1207
Clock Source
External RC
oscillator
External clock drive • 0 to 20 MHz
Internal Watchdog
Timer Oscillator
Caution:
OSC Control Register Unlocking/Locking
To write the oscillator control register, unlock it by making two writes to the OSCCTL
register with the values
changes the value of the actual register and returns the register to a Locked state. Any
other sequence of oscillator control register writes have no effect. The values written to
unlock the register must be ordered correctly, but are not necessarily consecutive. It is
possible to write to or read from other registers within the unlocking/locking operation.
When selecting a new clock source, the primary oscillator failure detection circuitry and
the Watchdog Timer Oscillator failure circuitry must be disabled. If POFEN and WOFEN
are not disabled prior to a clock switch-over, it is possible to generate an interrupt for a
failure of either oscillator. The failure detection circuitry can be enabled anytime after a
successful write of OSCSEL in the oscillator control register.
The Internal Precision Oscillator is enabled by default. If the user code changes to a
different oscillator, it may be appropriate to disable the IPO for power savings. Disabling
the IPO does not occur automatically.
Unintentional accesses to the oscillator control register can actually stop the chip by
switching to a non-functioning oscillator. To prevent this condition, the oscillator
control block employs a register unlocking/locking scheme.
Characteristics
• 32 kHz to 4 MHz
• Accuracy dependent on
• Accuracy dependent on
• 10 kHz nominal
• ± 40% accuracy; no external
• Low power consumption
external components
external clock source
components required
E7H
followed by
18H
. A third write to the OSCCTL register
Required Setup
• Configure Flash option bits for correct
• Unlock and write OSCCTL to enable
• Write GPIO registers to configure PB3
• Unlock and write OSCCTL to select
• Apply external clock signal to GPIO
• Enable WDT if not enabled and wait
• Unlock and write oscillator control
external OSCILLATOR mode
crystal oscillator and select as system
clock
pin for external clock function
external system clock
until WDT oscillator is operating.
register (OSCCTL) to enable and select
oscillator
Z8 Encore!
Product Specification
®
Oscillator Control
F0830 Series
144
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