C8051F365-GM Silicon Laboratories Inc, C8051F365-GM Datasheet - Page 117
![IC 8051 MCU 32K FLASH 28-QFN](/photos/12/27/122713/c8051f365-gm_sml.jpg)
C8051F365-GM
Manufacturer Part Number
C8051F365-GM
Description
IC 8051 MCU 32K FLASH 28-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F36xr
Specifications of C8051F365-GM
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
28-QFN
Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F360DK
Minimum Operating Temperature
- 40 C
Package
28QFN
Device Core
8051
Family Name
C8051F36x
Maximum Speed
100 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1647
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F365-GM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
- Current page: 117 of 288
- Download datasheet (3Mb)
11. Multiply And Accumulate (MAC0)
The C8051F36x devices include a multiply and accumulate engine which can be used to speed up many
mathematical operations. MAC0 contains a 16-by-16 bit multiplier and a 40-bit adder, which can perform
integer or fractional multiply-accumulate and multiply operations on signed input values in two SYSCLK
cycles. A rounding engine provides a rounded 16-bit fractional result after an additional (third) SYSCLK
cycle. MAC0 also contains a 1-bit arithmetic shifter that will left or right-shift the contents of the 40-bit accu-
mulator in a single SYSCLK cycle. Figure 11.1 shows a block diagram of the MAC0 unit and its associated
Special Function Registers.
11.1. Special Function Registers
There are thirteen Special Function Register (SFR) locations associated with MAC0. Two of these regis-
ters are related to configuration and operation, while the other eleven are used to store multi-byte input
and output data for MAC0. The Configuration register MAC0CF (SFR Definition 11.1) is used to configure
and control MAC0. The Status register MAC0STA (SFR Definition 11.2) contains flags to indicate overflow
conditions, as well as zero and negative results. The 16-bit MAC0A (MAC0AH:MAC0AL) and MAC0B
(MAC0BH:MAC0BL) registers are used as inputs to the multiplier. The MAC0 Accumulator register is 40
bits long, and consists of five SFRs: MAC0OVR, MAC0ACC3, MAC0ACC2, MAC0ACC1, and
MAC0ACC0. The primary results of a MAC0 operation are stored in the Accumulator registers. If they are
needed,
(MAC0RNDH:MAC0RNDL).
the
rounded
MAC0OVR
1 bit Shift
MAC0CF
MAC0AH
MAC0 A Register
results
MAC0FM
Figure 11.1. MAC0 Block Diagram
MAC0ACC3
are
MAC0AL
MAC0RNDH
16 x 16 Multiply
MAC0 Rounding Register
stored
MAC0 Accumulator
Rounding Engine
MAC0ACC2
C8051F360/1/2/3/4/5/6/7/8/9
40 bit Add
Rev. 1.0
MAC0BH
in
MAC0 B Register
MAC0RNDL
the
MAC0ACC1
16-bit
MAC0BL
1
0
MAC0MS
Rounding
MAC0STA
Flag Logic
0
MAC0ACC0
Register
MAC0RND
117
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