C8051F365-GM Silicon Laboratories Inc, C8051F365-GM Datasheet - Page 20
![IC 8051 MCU 32K FLASH 28-QFN](/photos/12/27/122713/c8051f365-gm_sml.jpg)
C8051F365-GM
Manufacturer Part Number
C8051F365-GM
Description
IC 8051 MCU 32K FLASH 28-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F36xr
Specifications of C8051F365-GM
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
28-QFN
Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F360DK
Minimum Operating Temperature
- 40 C
Package
28QFN
Device Core
8051
Family Name
C8051F36x
Maximum Speed
100 MHz
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1647
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F365-GM
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
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C8051F360/1/2/3/4/5/6/7/8/9
20
C2CK/RST
GND
VDD
Power-On
C2D
Monitor
Supply
Reset
XTAL1
XTAL2
Reset
Power
Net
System Clock Setup
2-cycle 16 by 16 Multiply
Low Frequency Oscillator
Oscillator
Oscillator
External
Debug / Programming
Internal
32/16 kB ISP FLASH
Controller Core
Program Memory
Figure 1.1. C8051F360/3 Block Diagram
CIP-51 8051
and Accumulate
256 Byte RAM
1 kB XRAM
Hardware
Multiplier
Clock
SFR
Bus
Rev. 1.0
C8051F360 only
VDD
Timers 0, 1,
PCA/WDT
VREF
10-bit
200 ksps
ADC
External Memory
Digital Peripherals
UART0
SMBus
Port I/O Configuration
2, 3
SPI
Crossbar Control
Interface
Address
Analog Peripherals
Control
VREF
Data
10-bit
IDAC
Crossbar
Decoder
Priority
M
A
U
X
P4.4
P2 / P3 / P4
P0 / P4
AIN0–AIN16
P1
2 Comparators
VDD
Sensor
CP0
CP1
Temp
Drivers
Drivers
Drivers
Drivers
Drivers
Port 0
Port 1
Port 2
Port 3
Port 4
+
+
-
-
P0.0
P0.1/TX
P0.2/RX
P0.3/VREF
P0.4/IDA0
P0.5/XTAL1
P0.6/XTAL2
P0.7/CNVSTR
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6/C2D
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