DF2378BVFQ35WV Renesas Electronics America, DF2378BVFQ35WV Datasheet - Page 105

IC H8S/2378 MCU FLASH 144-QFP

DF2378BVFQ35WV

Manufacturer Part Number
DF2378BVFQ35WV
Description
IC H8S/2378 MCU FLASH 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of DF2378BVFQ35WV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
35MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-QFP
For Use With
EDK2378 - DEV EVAL KIT FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2378BVFQ35WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
2.1.2
In comparison to the H8/300 CPU, the H8S/2000 CPU has the following enhancements.
• More general registers and control registers
• Expanded address space
• Enhanced addressing
• Enhanced instructions
• Higher speed
2.1.3
In comparison to the H8/300H CPU, the H8S/2000 CPU has the following enhancements.
• Additional control register
• Enhanced instructions
• Higher speed
⎯ Eight 16-bit extended registers, and one 8-bit and two 32-bit control registers, have been
⎯ Normal mode supports the same 64-kbyte address space as the H8/300 CPU.
⎯ Advanced mode supports a maximum 16-Mbyte address space.
⎯ The addressing modes have been enhanced to make effective use of the 16-Mbyte address
⎯ Addressing modes of bit-manipulation instructions have been enhanced.
⎯ Signed multiply and divide instructions have been added.
⎯ Two-bit shift and two-bit rotate instructions have been added.
⎯ Instructions for saving and restoring multiple registers have been added.
⎯ A test and set instruction has been added.
⎯ Basic instructions are executed twice as fast.
⎯ One 8-bit control register has been added.
⎯ Addressing modes of bit-manipulation instructions have been enhanced.
⎯ Two-bit shift and two-bit rotate instructions have been added.
⎯ Instructions for saving and restoring multiple registers have been added.
⎯ A test and set instruction has been added.
⎯ Basic instructions are executed twice as fast.
added.
space.
Differences from H8/300 CPU
Differences from H8/300H CPU
Rev.7.00 Mar. 18, 2009 page 37 of 1136
REJ09B0109-0700
Section 2 CPU

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