AT90PWM216-16SUR Atmel, AT90PWM216-16SUR Datasheet - Page 166

• Manufacturer Part Number: AT90PWM216-16SUR
• Description: MCU AVR 16K FLASH 16MHZ 24SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM216-16SUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 24-SOIC (7.5mm Width)
• Processor Series: AT90PWMx
• Core: AVR8
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.25.11 PSC 0 Control Register – PCTL0
166
AT90PWM216/316
Table 16-13. PSC n Mode Selection
• Bit 2 – POPn: PSC n Output Polarity
If this bit is cleared, the PSC outputs are active Low.
If this bit is set, the PSC outputs are active High.
• Bit 1 – PCLKSELn: PSC n Input Clock Select
This bit is used to select between CLKPF or CLKPS clocks.
Set this bit to select the fast clock input (CLKPF).
Clear this bit to select the slow clock input (CLKPS).
• Bit 0 – POME2: PSC 2 Output Matrix Enable (PSC2 only)
Set this bit to enable the Output Matrix feature on PSC2 outputs. See
159.
When Output Matrix is used, the PSC n Output Polarity POPn has no action on the outputs.
• Bit 7:6 – PPRE01:0 : PSC 0 Prescaler Select
This two bits select the PSC input clock division factor. All generated waveform will be modified
by this factor.
Table 16-14. PSC 0 Prescaler Selection
• Bit 5 – PBFM0 : Balance Flank Width Modulation
When this bit is clear, Flank Width Modulation operates on On-Time 1 only.
When this bit is set, Flank Width Modulation operates on On-Time 0 and On-Time 1.
Bit
Read/Write
Initial Value
PMODEn1
0
0
1
1
PPRE01
0
0
1
1
PPRE00
0
1
0
1
PPRE01
R/W
PMODEn0
0
1
0
1
7
0
PPRE00
R/W
6
0
Description
No divider on PSC input clock
Divide the PSC input clock by 4
Divide the PSC input clock by 32
Divide the PSC clock by 256
Description
One Ramp Mode
Two Ramp Mode
Four Ramp Mode
Center Aligned Mode
PBFM0
R/W
5
0
PAOC0B
R/W
4
0
PAOC0A
R/W
3
0
PARUN0
R/W
2
0
PCCYC0
R/W
“PSC2 Outputs” on page
1
0
PRUN0
R/W
0
0
7710E–AVR–08/10
PCTL0