AT90PWM216-16SUR Atmel, AT90PWM216-16SUR Datasheet - Page 58
![MCU AVR 16K FLASH 16MHZ 24SOIC](/photos/6/70/67046/453-24-soic_sml.jpg)
AT90PWM216-16SUR
Manufacturer Part Number
AT90PWM216-16SUR
Description
MCU AVR 16K FLASH 16MHZ 24SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM216-16SU.pdf
(359 pages)
Specifications of AT90PWM216-16SUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
24-SOIC (7.5mm Width)
Processor Series
AT90PWMx
Core
AVR8
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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10.1.1
10.1.2
58
AT90PWM216/316
Moving Interrupts Between Application and Boot Space
MCU Control Register – MCUCR
When the BOOTRST Fuse is programmed, the Boot section size set to 2K bytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses in AT90PWM216/316 is:
The MCU Control Register controls the placement of the Interrupt Vector table.
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-
mined by the BOOTSZ Fuses. Refer to the section
Bit
Read/Write
Initial Value
0x002
...
0x01F
;
.org 0xC00
0xC00
0xC01
0xC02
0xC03
0xC04
0xC05
Address Labels Code
;
.org 0xC00
0xC00
0xC01
0xC02
...
0xC1F
;
0xC20
0xC21
0xC22
0xC23
0xC24
0xC25
RESET: ldi
RESET: ldi
SPIPS
R/W
7
0
rjmp
...
rjmp
out
ldi
out
sei
<instr>
rjmp
rjmp
rjmp
...
rjmp
out
ldi
out
sei
<instr>
R
6
–
0
PSC2_EC
...
SPM_RDY
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
RESET
PSC2_CAPT
PSC2_EC
...
SPM_RDY
r16,high(RAMEND); Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
xxx
R
5
–
0
PUD
R/W
4
0
; PSC2 End Cycle Handler
;
; Store Program Memory Ready Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
Comments
; Reset handler
; PSC2 Capture event Handler
; PSC2 End Cycle Handler
;
; Store Program Memory Ready Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
“Boot Loader Support – Read-While-Write
R
3
–
0
R
2
–
0
IVSEL
R/W
1
0
IVCE
R/W
0
0
7710E–AVR–08/10
MCUCR
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