AT90PWM216-16SUR Atmel, AT90PWM216-16SUR Datasheet - Page 249

MCU AVR 16K FLASH 16MHZ 24SOIC

AT90PWM216-16SUR

Manufacturer Part Number
AT90PWM216-16SUR
Description
MCU AVR 16K FLASH 16MHZ 24SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet

Specifications of AT90PWM216-16SUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
24-SOIC (7.5mm Width)
Processor Series
AT90PWMx
Core
AVR8
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7710E–AVR–08/10
These 2 bits determine the voltage reference for the ADC.
The different setting are shown in
Table 21-3.
If these bits are changed during a conversion, the change will not take effect until this conversion
is complete (it means while the ADIF bit in ADCSRA register is set).
In case the internal Vref is selected, it is turned ON as soon as an analog feature needed it is
set.
• Bit 5 – ADLAR: ADC Left Adjust Result
Set this bit to left adjust the ADC result.
Clear it to right adjust the ADC result.
The ADLAR bit affects the configuration of the ADC result data registers. Changing this bit
affects the ADC data registers immediately regardless of any on going conversion. For a com-
plete description of this bit, see Section “ADC Result Data Registers – ADCH and ADCL”,
page 252.
• Bit 3, 2, 1, 0 – MUX3, MUX2, MUX1, MUX0: ADC Channel Selection Bits
These 4 bits determine which analog inputs are connected to the ADC input. The different set-
ting are shown in
Table 21-4.
REFS1
0
0
1
1
MUX3
0
0
0
0
0
0
0
0
1
1
1
1
1
ADC Voltage Reference Selection
ADC Input Channel Selection
REFS0
0
1
0
1
MUX2
0
0
0
0
1
1
1
1
0
0
0
0
1
Table
21-4.
Description
External Vref on AREF pin, Internal Vref is switched off
AVcc with external capacitor connected on the AREF pin
Reserved
Internal 2.56V Reference voltage with external capacitor connected on
the AREF pin
MUX1
0
0
1
1
0
0
1
1
0
0
1
1
0
Table
21-3.
MUX0
0
1
0
1
0
1
0
1
0
1
0
1
0
Description
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
ADC8
ADC9
ADC10
AMP0
AMP1 (- is ADC8, + is ADC9)
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