PIC16C781-I/P Microchip Technology, PIC16C781-I/P Datasheet - Page 123

IC MCU OTP 1KX14 W/AD COMP 20DIP

PIC16C781-I/P

Manufacturer Part Number
PIC16C781-I/P
Description
IC MCU OTP 1KX14 W/AD COMP 20DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C781-I/P

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
16
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
On-chip Dac
8 bit, 1 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVA16XP202 - ADAPTER DEVICE PIC16C781/782DM163012 - BOARD DEMO PICDEM FOR 16C781/782AC164028 - MODULE SKT PROMATEII 20SOIC/DIP
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16C781I/P
14.3
The PIC16C781/782 devices have several different
RESETS. These RESETS are grouped into two classi-
fications: power-up and non power-up. The power-up
type RESETS are the Power-on and Brown-out
Resets, which assume the device V
normal operating range for the device’s configuration.
The non power-up type RESETS assume normal oper-
ating limits were maintained before/during and after the
RESET.
• Power-on Reset (POR)
• Programmable Brown-out Reset (PBOR)
• Non Power-up (MCLR) Reset during normal
• MCLR Reset during SLEEP
• WDT Reset (during normal operation)
FIGURE 14-4:
RA7/OSC1/
RA5/MCLR/V
CLKIN
operation
2001 Microchip Technology Inc.
V
DD
RESET
PP
Dedicated
Oscillator
OST/PWRT
Programmable
V
Module
Brown-out
Detect
DD
WDT
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
Rise
OST
PWRT
Time-out
10-bit Ripple Counter
10-bit Ripple Counter
Power-on Reset
BODEN
External
RESET
SLEEP
DD
was below its
Preliminary
Enable PWRT
Enable OST
Some registers are not affected in any RESET condi-
tion. Their status is unknown on a Power-up Reset and
unchanged in any other RESET. Most other registers
are placed into an initialized state upon RESET. How-
ever, they are not affected by a WDT Reset during
SLEEP, because this is considered a WDT Wake-up,
which is viewed as the resumption of normal operation.
Several status bits have been provided to indicate
which RESET occurred (see
Table 14-5 for a full description of RESET states of
special registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 14-4.
These devices have a MCLR noise filter in the MCLR
Reset path. The filter detects and ignores small pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
PIC16C781/782
S
R
DS41171A-page 121
Table 14-4).
Q
Chip_Reset
See

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