PIC16C781-I/P Microchip Technology, PIC16C781-I/P Datasheet - Page 67

IC MCU OTP 1KX14 W/AD COMP 20DIP

PIC16C781-I/P

Manufacturer Part Number
PIC16C781-I/P
Description
IC MCU OTP 1KX14 W/AD COMP 20DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C781-I/P

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
16
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
On-chip Dac
8 bit, 1 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVA16XP202 - ADAPTER DEVICE PIC16C781/782DM163012 - BOARD DEMO PICDEM FOR 16C781/782AC164028 - MODULE SKT PROMATEII 20SOIC/DIP
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16C781I/P
If another module has enabled the bandgap, then the
reference will be stable when the PLVD module is
enabled and the BGST flag can be ignored. However,
if the bandgap has not been previously enabled, the
LVDIF bit will not be valid until the BGST bit is set (see
Figure 8-3). Systems using the PLVD interrupt should
not enable the interrupt until after the reference is sta-
ble to prevent spurious interrupts.
8.2.1
The following steps are needed to set up the PLVD
Module:
1.
FIGURE 8-3:
Internally Generated
Reference Stable
Internally Generated
Reference Stable
2001 Microchip Technology Inc.
CASE 1:
CASE 2:
Write the value to the LV3:LV0 bits (LVDCON
register), which selects the desired PLVD Trip
Point.
Enable LVD
Enable LVD
LVDIF
LVDIF
V
V
SETTING UP THE PLVD MODULE
DD
DD
LOW VOLTAGE DETECT WAVEFORMS
LVDIF may not be set
Preliminary
but remains set as LVD condition
still exists
Attempt to clear LVDIF in software
2.
3.
4.
5.
6.
Ensure that PLVD interrupts are disabled (the
LVDIE bit is cleared, or the GIE bit is cleared).
Enable the PLVD module (set the LVDEN bit in
the LVDCON register).
Wait for the PLVD module to stabilize (the BGST
bit to become set).
Clear the PLVD interrupt flag, which may have
falsely become set until the PLVD module has
stabilized (clear the LVDIF bit).
Enable the PLVD interrupt (set the LVDIE and
the GIE bits).
LVDIF cleared in software
PIC16C781/782
LVDIF cleared in software
VLVD
.
VLVD
DS41171A-page 65

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