ATMEGA128A-AUR Atmel, ATMEGA128A-AUR Datasheet - Page 107

MCU AVR 128K FLASH 16MHZ 64TQFP

ATMEGA128A-AUR

Manufacturer Part Number
ATMEGA128A-AUR
Description
MCU AVR 128K FLASH 16MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA128A-AUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA128A-AUR
Manufacturer:
ATMEL
Quantity:
3 000
Part Number:
ATMEGA128A-AUR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA128A-AUR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
8151H–AVR–02/11
COM01:0 bits setting. Note that the FOC0 bit is implemented as a strobe. Therefore it is the
value present in the COM01:0 bits that determines the effect of the forced compare.
A FOC0 strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0 as TOP.
The FOC0 bit is always read as zero.
• Bit 6, 3 – WGM01:0: Waveform Generation Mode
These bits control the counting sequence of the counter, the source for the maximum (TOP)
counter value, and what type of waveform generation to be used. Modes of operation supported
by the Timer/Counter unit are: Normal mode, Clear Timer on Compare match (CTC) mode, and
two types of Pulse Width Modulation (PWM) modes. See
on page
Table 14-2.
Note:
• Bit 5:4 – COM01:0: Compare Match Output Mode
These bits control the output compare pin (OC0) behavior. If one or both of the COM01:0 bits
are set, the OC0 output overrides the normal port functionality of the I/O pin it is connected to.
However, note that the Data Direction Register (DDR) bit corresponding to OC0 pin must be set
in order to enable the output driver.
When OC0 is connected to the pin, the function of the COM01:0 bits depends on the WGM01:0
bit setting.
normal or CTC mode (non-PWM).
Table 14-3.
Mode
0
1
2
3
COM01
0
0
1
1
1. The CTC0 and PWM0 bit definition names are now obsolete. Use the WGM01:0 definitions.
98.
WGM01
Table 14-3
However, the functionality and location of these bits are compatible with previous versions of
the timer.
(CTC0)
Waveform Generation Mode Bit Description
Compare Output Mode, non-PWM Mode
0
0
1
1
(1)
COM00
shows the COM01:0 bit functionality when the WGM01:0 bits are set to a
0
1
0
1
WGM00
(PWM0)
0
1
0
1
(1)
Description
Normal port operation, OC0 disconnected.
Toggle OC0 on compare match
Clear OC0 on compare match
Set OC0 on compare match
Timer/Counter Mode
of Operation
Normal
PWM, Phase Correct
CTC
Fast PWM
Table 14-2
TOP
0xFF
0xFF
OCR0
0xFF
Immediate
BOTTOM
Update of
OCR0 at
TOP
Immediate
and
ATmega128A
“Modes of Operation”
TOV0 Flag
Set on
MAX
BOTTOM
MAX
MAX
107

Related parts for ATMEGA128A-AUR