ATMEGA128A-AUR Atmel, ATMEGA128A-AUR Datasheet - Page 46

• Manufacturer Part Number: ATMEGA128A-AUR
• Description: MCU AVR 128K FLASH 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9. Power Management and Sleep Modes
9.1
9.2
8151H–AVR–02/11
Overview
Sleep modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The Atmel
sumption to the application’s requirements.
Figure 8-1 on page 37
bution. The figure is helpful in selecting an appropriate sleep mode.
different sleep modes and their wake-up sources.
Table 9-1.
Notes:
To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the MCUCR Register
select which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, Standby, or
Extended Standby) will be activated by the SLEEP instruction. See
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, it executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the register file and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
SleepMode
Idle
ADC Noise Reduction
Power-down
Power-save
Standby
Extended Standby
1. External Crystal or resonator selected as clock source
2. If AS
3. Only INT3:0 or level interrupt INT7:4
(1)
Active Clock Domains and Wake Up Sources in the Different Sleep Modes
0
®
bit in ASSR is set
(1)
AVR
presents the different clock systems in the ATmega128A, and their distri-
®
provides various sleep modes allowing the user to tailor the power con-
Active Clock Domains
X
X
X
X
X
X
X
(2)
(2)
Oscillators
X
X
X
X
X
X
X
X
(2)
(2)
(2)
(2)
X
X
X
X
X
X
(3)
(3)
(3)
(3)
(3)
Table 9-2
ATmega128A
Wake Up Sources
X
X
X
X
X
X
Table 9-1
X
X
X
X
(2)
(2)
for a summary.
X
X
shows the
X
X
X
46