ATMEGA128A-AUR Atmel, ATMEGA128A-AUR Datasheet - Page 291

• Manufacturer Part Number: ATMEGA128A-AUR
• Description: MCU AVR 128K FLASH 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26. Memory Programming
26.1
8151H–AVR–02/11
Program and Data Memory Lock Bits
The ATmega128A provides six Lock bits which can be left unprogrammed (“1”) or can be pro-
grammed (“0”) to obtain the additional features listed in
erased to “1” with the Chip Erase command.
Table 26-1.
Note:
Table 26-2.
BLB12
BLB11
BLB02
BLB01
LB2
LB1
BLB0 mode
LB mode
Lock Bit Byte
1
2
3
1
2
3
4
“1” means unprogrammed, “0´means programmed
Memory Lock Bits
Lock Bit Byte
Lock Bit Protection Modes
BLB02
LB2
1
1
0
1
1
0
0
BLB01
LB1
Bit No.
1
0
0
1
0
0
1
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is disabled in
Parallel and SPI/JTAG Serial Programming mode. The Fuse bits
are locked in both Serial and Parallel Programming mode.
Further programming and verification of the Flash and EEPROM
is disabled in Parallel and SPI/JTAG Serial Programming mode.
The Fuse bits are locked in both Serial and Parallel
Programming mode.
No restrictions for SPM or (E)LPM accessing the Application
section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
(E)LPM executing from the Boot Loader section is not allowed to
read from the Application section. If interrupt vectors are placed
in the Boot Loader section, interrupts are disabled while
executing from the Application section.
(E)LPM executing from the Boot Loader section is not allowed to
read from the Application section. If interrupt vectors are placed
in the Boot Loader section, interrupts are disabled while
executing from the Application section.
Description
–
–
Boot lock bit
Boot lock bit
Boot lock bit
Boot lock bit
Lock bit
Lock bit
(1)
Table
26-2. The Lock bits can only be
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
ATmega128A
(1)
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