ATMEGA128A-AUR Atmel, ATMEGA128A-AUR Datasheet - Page 382

• Manufacturer Part Number: ATMEGA128A-AUR
• Description: MCU AVR 128K FLASH 16MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA128A-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

iv
ATmega128A
18 Output Compare Modulator (OCM1C2) .............................................. 163
19 Serial Peripheral Interface – SPI ......................................................... 165
20 USART ................................................................................................... 174
21 Two-wire Serial Interface ..................................................................... 201
22 Analog Comparator ............................................................................. 230
17.9
18.1
18.2
19.1
19.2
19.3
19.4
19.5
20.1
20.2
20.3
20.4
20.5
20.6
20.7
20.8
20.9
20.10
21.1
21.2
21.3
21.4
21.5
21.6
21.7
21.8
21.9
22.1
22.2
Register Description ......................................................................................159
Overview ........................................................................................................163
Description .....................................................................................................163
Features ........................................................................................................165
Overview ........................................................................................................165
SS Pin Functionality ......................................................................................170
Data Modes ...................................................................................................170
Register Description ......................................................................................171
Features ........................................................................................................174
Overview ........................................................................................................174
Clock Generation ...........................................................................................176
Frame Formats ..............................................................................................179
USART Initialization .......................................................................................180
Data Transmission – The USART Transmitter ..............................................181
Data Reception – The USART Receiver .......................................................184
Multi-processor Communication Mode ..........................................................191
Register Description ......................................................................................192
Examples of Baud Rate Setting .....................................................................198
Features ........................................................................................................201
Two-wire Serial Interface Bus Definition ........................................................201
Data Transfer and Frame Format ..................................................................202
Multi-master Bus Systems, Arbitration and Synchronization .........................205
Overview of the TWI Module .........................................................................206
Using the TWI ................................................................................................209
Transmission Modes .....................................................................................212
Multi-master Systems and Arbitration ............................................................225
Register Description ......................................................................................226
Overview ........................................................................................................230
Analog Comparator Multiplexed Input ...........................................................230
8151H–AVR–02/11