ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 108
ATSAM3S4AA-MU
Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4AA-MU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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10.13.2
10.13.2.1
10.13.2.2
10.13.2.3
10.13.2.4
108
SAM3S Preliminary
AND, ORR, EOR, BIC, and ORN
Syntax
Operation
Restrictions
Condition flags
Logical AND, OR, Exclusive OR, Bit Clear, and OR NOT.
where:
op
S
result of the operation, see
cond
Rd
Rn
Operand2
details of the options.
The AND, EOR, and ORR instructions perform bitwise AND, Exclusive OR, and OR operations
on the values in Rn and Operand2.
The BIC instruction performs an AND operation on the bits in Rn with the complements of the
corresponding bits in the value of Operand2.
The ORN instruction performs an OR operation on the bits in Rn with the complements of the
corresponding bits in the value of Operand2.
Do not use SP and do not use PC.
If S is specified, these instructions:
• update the N and Z flags according to the result
• can update the C flag during the calculation of Operand2, see
• do not affect the V flag.
page 80
op{S}{cond} {Rd,} Rn, Operand2
AND
ORR
EOR
BIC
ORN
is one of:
logical AND.
logical OR, or bit set.
logical Exclusive OR.
logical AND NOT, or bit clear.
logical OR NOT.
is an optional suffix. If S is specified, the condition code flags are updated on the
is an optional condition code, see
is the destination register.
is the register holding the first operand.
is a flexible second operand. See
“Conditional execution” on page
See “Conditional execution” on page
“Flexible second operand” on page 80
84.
“Flexible second operand” on
6500C–ATARM–8-Feb-11
84..
for
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