ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 364
ATSAM3S4AA-MU
Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4AA-MU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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23.6
23.6.1
Figure 23-2.
23.6.1.1
Figure 23-3. NAND Flash Signal Multiplexing on SMC Pins
364
Connection to External Devices
SAM3S Preliminary
Data Bus Width
NAND Flash Support
Memory Connection for an 8-bit Data Bus
* in CCFG_SMCNFCS Matrix register
NCSx (activated if SMC_NFCSx=1) *
The data bus width is 8 bits.
Figure 23-2
The SMC integrates circuitry that interfaces to NAND Flash devices.
The NAND Flash logic is driven by the Static Memory Controller. It depends on the programming
of the SMC_NFCSx field in the CCFG_SMCNFCS Register on the Bus Matrix User Interface.
For details on this register, refer to the Bus Matrix User Interface section. Access to an external
NAND Flash device via the address space reserved to the chip select programmed.
The user can connect up to 4 NAND Flash devices with separated chip select.
The NAND Flash logic drives the read and write command signals of the SMC on the NANDOE
and NANDWE signals when the NCSx programmed is active. NANDOE and NANDWE are dis-
abled as soon as the transfer address fails to lie in the NCSx programmed address space.
Note: When NAND Flash logic is activated, (SMCNFCSx=1), NWE pin cannot be used i PIO
Mode but only in peripheral mode (NWE function). If NWE function is not used for other external
memories (SRAM, LCD), it must be configured in one of the following modes.
SMC
SMC
shows how to connect a 512K x 8-bit memory on NCS2.
NWE
NRD
A[18:0]
NCS[2]
D[7:0]
NWE
NRD
NAND Flash Logic
Write Enable
Output Enable
Memory Enable
D[7:0]
A[18:0]
NANDOE
NANDWE
NANDOE
NANDWE
6500C–ATARM–8-Feb-11
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