ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 24
![IC MCU 32BIT 256KB FLASH 48QFN](/photos/7/34/73471/48-vqfn-6_543-5130_01-4_sml.jpg)
ATSAM3S4AA-MU
Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4AA-MU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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6. Input/Output Lines
6.1
6.2
24
General Purpose I/O Lines
System I/O Lines
SAM3S Preliminary
The SAM3S has several kinds of input/output (I/O) lines such as general purpose I/Os (GPIO)
and system I/Os. GPIOs can have alternate functionality due to multiplexing capabilities of the
PIO controllers. The same PIO line can be used whether in IO mode or by the multiplexed
peripheral. System I/Os include pins such as test pins, oscillators, erase or analog inputs.
GPIO Lines are managed by PIO Controllers. All I/Os have several input or output modes such
as pull-up or pull-down, input Schmitt triggers, multi-drive (open-drain), glitch filters, debouncing
or input change interrupt. Programming of these modes is performed independently for each I/O
line through the PIO controller user interface. For more details, refer to the product “PIO Control-
ler” section.
The input/output buffers of the PIO lines are supplied through VDDIO power supply rail.
The SAM3S embeds high speed pads able to handle up to 32 MHz for HSMCI (MCK/2), 45 MHz
for SPI clock lines and 35 MHz on other lines. See AC Characteristics Section in the Electrical
Characteristics Section of the datasheet for more details. Typical pull-up and pull-down value is
100 kΩ for all I/Os.
Each I/O line also embeds an ODT (On-Die Termination), see
nal series resistor termination scheme for impedance matching between the driver output
(SAM3S) and the PCB trace impedance preventing signal reflection. The series resistor helps to
reduce IOs switching current (di/dt) thereby reducing in turn, EMI. It also decreases overshoot
and undershoot (ringing) due to inductance of interconnect between devices or between boards.
In conclusion ODT helps diminish signal integrity issues.
Figure 6-1.
System I/O lines are pins used by oscillators, test mode, reset and JTAG to name but a few.
Described below are the SAM3S system I/O lines shared with PIO lines:
These pins are software configurable as general purpose I/O or system pins. At startup the
default function of these pins is always used.
On-Die Termination
Zout ~ 10 Ohms
SAM3 Driver with
36 Ohms Typ.
Rodt
ODT
Z0 ~ Zout + Rodt
Z0 ~ 50 Ohms
PCB Trace
Figure
Receiver
6-1. It consists of an inter-
6500C–ATARM–8-Feb-11
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