ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 795

• Manufacturer Part Number: ATSAM3S4AA-MU
• Description: IC MCU 32BIT 256KB FLASH 48QFN
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4AA-MU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 8x10/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

35. High Speed MultiMedia Card Interface (HSMCI)
35.1
35.2
6500C–ATARM–8-Feb-11
Description
Embedded Characteristics
The High Speed MultiMedia Card Interface (HSMCI) supports the MultiMedia Card (MMC)
Specification V4.3, the SD Memory Card Specification V2.0, the SDIO V2.0 specification and
CE-ATA V1.1.
The HSMCI includes a command register, response registers, data registers, timeout counters
and error detection logic that automatically handle the transmission of commands and, when
required, the reception of the associated responses and data with a limited processor overhead.
The HSMCI supports stream, block and multi block data read and write, and is compatible with
the Peripheral DMA Controller (PDC) Channels, minimizing processor intervention for large buf-
fer transfers.
The HSMCI operates at a rate of up to Master Clock divided by 2 and supports the interfacing of
1 slot(s). Each slot may be used to interface with a High Speed MultiMediaCard bus (up to 30
Cards) or with an SD Memory Card. Only one slot can be selected at a time (slots are multi-
plexed). A bit field in the SD Card Register performs this selection.
The SD Memory Card communication is based on a 9-pin interface (clock, command, four data
and three power lines) and the High Speed MultiMedia Card on a 7-pin interface (clock, com-
mand, one data, three power lines and one reserved for future use).
The SD Memory Card interface also supports High Speed MultiMedia Card operations. The
main differences between SD and High Speed MultiMedia Cards are the initialization process
and the bus topology.
HSMCI fully supports CE-ATA Revision 1.1, built on the MMC System Specification v4.0. The
module includes dedicated hardware to issue the command completion signal and capture the
host command completion signal disable.
• 4-bit or 1-bit Interface
• Compatibility with MultiMedia Card Specification Version 4.3
• Compatibility with SD and SDHC Memory Card Specification Version 2.0
• Compatibility with SDIO Specification Version V2.0.
• Compatibility with CE-ATA Specification 1.1
• Cards clock rate up to Master Clock divided by 2
• Boot Operation Mode support
• High Speed mode support
• Embedded power management to slow down clock rate when not used
• HSMCI has one slot supporting
• Support for stream, block and multi-block data read and write
– One MultiMediaCard bus (up to 30 cards) or
– One SD Memory Card
– One SDIO Card
SAM3S Preliminary
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