ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 962
![IC MCU 32BIT 256KB FLASH 48QFN](/photos/7/34/73471/48-vqfn-6_543-5130_01-4_sml.jpg)
ATSAM3S4AA-MU
Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4AA-MU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 962 of 1118
- Download datasheet (24Mb)
37.7.12
Name:
Address:
Access:
WARNING: The UDP peripheral clock in the Power Management Controller (PMC) must be enabled before any read/write
operations to the UDP registers including the UDP_TXVC register.
• TXVDIS: Transceiver Disable
When UDP is disabled, power consumption can be reduced significantly by disabling the embedded transceiver. This can
be done by setting TXVDIS field.
To enable the transceiver, TXVDIS must be cleared.
• PUON: Pull-up On
0: The 1.5KΩ integrated pull-up on DDP is disconnected.
1: The 1.5 KΩ integrated pull-up on DDP is connected.
NOTE: If the USB pull-up is not connected on DDP, the user should not write in any UDP register other than the
UDP_TXVC register. This is because if DDP and DDM are floating at 0, or pulled down, then SE0 is received by the device
with the consequence of a USB Reset.
962
31
23
15
–
–
–
7
–
SAM3S Preliminary
UDP Transceiver Control Register
30
22
14
UDP_TXVC
0x40034074
Read-write
–
–
–
6
–
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
–
PUON
25
17
–
–
9
1
–
6500C–ATARM–8-Feb-11
TXVDIS
24
16
–
–
8
0
–
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