ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 43
ATSAM3S4AA-MU
Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4AA-MU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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10.4.3
6500C–ATARM–8-Feb-11
Core registers
decrements the stack pointer and then writes the item to the new memory location. The proces-
sor implements two stacks, the main stack and the process stack, with independent copies of
the stack pointer, see
In Thread mode, the CONTROL register controls whether the processor uses the main stack or
the process stack, see
uses the main stack. The options for processor operations are:
Table 10-1.
1.
The processor core registers are:
Processor
mode
Thread
Handler
Program Counter
Low registers
High registers
Stack Pointer
Link Register
See
“CONTROL register” on page
Summary of processor mode, execution privilege level, and stack use options
Used to
execute
Applications
Exception
handlers
“Stack Pointer” on page
FAULTMASK
“CONTROL register” on page
CONTROL
PRIMASK
BASEPRI
SP (R13)
LR (R14)
PC (R15)
PSR
R10
R11
R12
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
Privilege level for
software execution
Privileged or
unprivileged
Always privileged
51.
General-purpose registers
Program status register
Exception mask registers
CONTROL register
PSP
(1)
44.
‡
51. In Handler mode, the processor always
MSP
SAM3S Preliminary
Stack used
Main stack or process
stack
Main stack
‡
(1)
Special registers
‡
Banked version of SP
43
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