ST7FLITEUS5B6 STMicroelectronics, ST7FLITEUS5B6 Datasheet - Page 26

MCU 8BIT 1KB FLASH 128KB 8-DIP

ST7FLITEUS5B6

Manufacturer Part Number
ST7FLITEUS5B6
Description
MCU 8BIT 1KB FLASH 128KB 8-DIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLITEUS5B6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
ST7
No. Of I/o's
5
Ram Memory Size
128Byte
Cpu Speed
8MHz
No. Of Timers
2
Rohs Compliant
Yes
For Use With
497-6403 - BOARD EVAL 8BIT MICRO + TDE1708497-6407 - BOARD EVAL FOR VACUUM CLEANER497-5861 - EVAL BRD POWER MOSFET/8PIN MCU497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5515 - EVAL BOARD PHASE CTRL DIMMER497-5049 - KIT STARTER RAISONANCE ST7FLITE497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Other names
497-5636-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FLITEUS5B6
Manufacturer:
STMicroelectronics
Quantity:
8
Central processing unit
5.3.5
Note:
26/136
Stack Pointer (SP)
Reset value: 00 FFh
The Stack Pointer is a 16-bit register which is always pointing to the next free location in the
stack. It is then decremented after data has been pushed onto the stack and incremented
before data is popped from the stack (see
Since the stack is 64 bytes deep, the 10 most significant bits are forced by hardware.
Following an MCU Reset, or after a Reset Stack Pointer instruction (RSP), the Stack Pointer
contains its reset value (the SP5 to SP0 bits are set) which is the stack higher address.
The least significant byte of the Stack Pointer (called S) can be directly accessed by a LD
instruction.
When the lower limit is exceeded, the Stack Pointer wraps around to the stack upper limit,
without indicating the stack overflow. The previously stored information is then overwritten
and therefore lost. The stack also wraps in case of an underflow.
The stack is used to save the return address during a subroutine call and the CPU context
during an interrupt. The user may also directly manipulate the stack by means of the PUSH
and POP instructions. In the case of an interrupt, the PCL is stored at the first location
pointed to by the SP. Then the other registers are stored in the next locations as shown in
Figure
A subroutine call is located at two locations and an interrupt five locations in the stack area.
When an interrupt is received, the SP is decremented and the context is pushed on the
stack.
On return from interrupt, the SP is incremented and the context is popped from the
stack.
15
0
7
1
8.
0
1
SP5
0
SP4
0
Read/write
Read/write
Figure
8).
SP3
0
SP2
0
ST7LITEUS2, ST7LITEUS5
SP1
0
SP0
8
0
0

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