DF2378RVFQ34V Renesas Electronics America, DF2378RVFQ34V Datasheet - Page 353

• Manufacturer Part Number: DF2378RVFQ34V
• Description: IC H8S MCU FLASH 512K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2378RVFQ34V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 34MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.3.4
DMACR controls the operation of each DMAC channel.
The DMA has four DMACR registers: DMACR_0A in channel 0 (channel 0A), DMACR_0B in
channel 0 (channel 0B), DMACR_1A in channel 1 (channel 1A), and DMACR_1B in channel 1
(channel 1B).
In short address mode, channels A and B operate independently, and in full address mode,
channels A and B operate together. The bit functions in the DMACR registers differ according to
the transfer mode.
Short Address Mode:
• DMACR_0A, DMACR_0B, DMACR_1A, and DMARC_1B
Bit
7
6
Bit Name
DTSZ
DTID
DMA Control Registers (DMACRA and DMACRB)
Initial Value
0
0
R/W
R/W
R/W
Description
Data Transfer Size
Selects the size of data to be transferred at one
time.
0: Byte-size transfer
1: Word-size transfer
Selects incrementing or decrementing of MAR after
every data transfer in sequential mode or repeat
mode. In idle mode, MAR is neither incremented
nor decremented.
0: MAR is incremented after a data transfer
•
•
1: MAR is decremented after a data transfer
•
•
Data Transfer Increment/Decrement
(Initial value)
When DTSZ = 0, MAR is incremented by 1
When DTSZ = 1, MAR is incremented by 2
When DTSZ = 0, MAR is decremented by 1
When DTSZ = 1, MAR is decremented by 2
Rev.7.00 Mar. 18, 2009 page 285 of 1136
Section 7 DMA Controller (DMAC)
REJ09B0109-0700