DF2378RVFQ34V Renesas Electronics America, DF2378RVFQ34V Datasheet - Page 956

• Manufacturer Part Number: DF2378RVFQ34V
• Description: IC H8S MCU FLASH 512K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2378RVFQ34V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 34MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• For Use With: YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK2378 - DEV EVAL KIT FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 21 Flash Memory (0.18-μm F-ZTAT Version)
(a) Flash erase block select parameter (FEBS: general register ER0 of CPU)
This parameter specifies the erase-block number.
Bit
31 to 8
7 to 0
Note:
(b) Flash pass/fail parameter (FPFR: general register R0L of CPU)
This parameter returns value of the erasing processing result.
Bit
7
6
Rev.7.00 Mar. 18, 2009 page 888 of 1136
REJ09B0109-0700
* For the H8S/2372, H8S/2371, H8S/2370, H8S/2372R, H8S/2371R, and H8S/2370R
Bit
Name
⎯
EBN7 to
EBN0
Bit
Name
⎯
MD
choose a setting value within the range from H'00 to H'0B. For the H8S/2374 and
H8S/2374R, choose a setting value within the range from H'00 to H'0D.
Initial
Value
⎯
⎯
Initial
Value
⎯
⎯
R/W
⎯
R/W
R/W
⎯
R/W
Description
Unused
These bits should be cleared to H'0.
Erase Block Number
Set an erase-block number within the range from 0 to 15.
H'00 corresponds to the EB0 block and H'0F
corresponds to the EB15 block. An error occurs if a
number outside the range from H'00 to H'0F * is set.
Description
Unused
Return 0.
Programming Mode Related Setting Error Detect
Returns the check result of whether the error protection
state is entered. The error protection state is entered, 1
is written to this bit. The error protection state can be
confirmed with the FLER bit in FCCS. For conditions to
enter the error protection state, see section 21.5.3, Error
Protection.
0: FLER setting is normal (FLER = 0)
1: FLER = 1 and programming cannot be performed