DF2170VTE33 Renesas Electronics America, DF2170VTE33 Datasheet - Page 163
DF2170VTE33
Manufacturer Part Number
DF2170VTE33
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2170BVTE33V.pdf
(572 pages)
Specifications of DF2170VTE33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
SCI, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
HD64F2170VTE33
HD64F2170VTE33
HD64F2170VTE33
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2170VTE33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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6.6.9
When inserting wait states in a DRAM access cycle, program wait insertion is specified.
Wait states are inserted to extend the CAS assertion period in a read access to DRAM space, and
to extend the write data setup time relative to the falling edge of CAS in a write access.
When the AST2 bit in ACSCR is set to 1, from 0 to 7 wait states can be inserted automatically
between the T
Figures 6.27 and 6.28 show examples of wait cycle insertion timing in the case of 2-state and 3-
state column address output cycles.
Figure 6.27 Example of Wait State Insertion Timing (2-State Column Address Output)
Read
Write
Wait Control
c1
state and T
φ
Address bus
Data bus
Data bus
(
(
(
(
,
,
)
)
)
)
c2
state, according to the settings of WTCR.
T
Row address
p
T
r
High
High
T
c1
Column address
T
w
Rev. 2.00, 03/04, page 129 of 534
T
w
T
c2
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