HD6417727F100C Renesas Electronics America, HD6417727F100C Datasheet - Page 15

• Manufacturer Part Number: HD6417727F100C
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100C

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

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24.5.1 Restriction of the Data Size in IN
Transfer
When a data packet shorter than
MAXPACKETSIZE (short packet) is
transferred in the IN data transfer other
than the isochronous transfer, following
usages are restricted.
2. …Be sure to transfer MAXPACKETSIZE
mainly and the processed data will be used
so that the end of the data or head can be
recognized when a short packet is sent.
25.5 Usage Notes
26.1 Overview
Table 26.1 List of Multiplexed Pins
RAS3
30.1.1 Features
30.1.4 PCMCIA Support
Figures 30.3 and 30.4 show the relationship
between the memory space of the SH7727
and the memory and I/O spaces of the PC
card in the continuous 16-MB area mode.
Although memory space and I/O space are
supported in area 6.
Previous Version
When a data packet shorter than
MAXPACKETSIZE (short packet) is
transferred in the IN data transfer
following usages are restricted.
2. …Be sure to transfer MAXPACKETSIZE
mainly and the processed data will be used
so that the end of the data or head can be
recognized when a short packet is sent.
In applications where the receive data size
cannot be controlled by software, it is not
possible to use software to remove the 1
byte of unnecessary data. When using the
module in such cases, appropriate
countermeasures must be considered.
24.8 Usage Notes of Resume Operation of
Newly added
25.4 Clock and LCD Data Signal Examples
Figure 25.19 "Clock and LCD Data Signal
Example" deleted
Note 2 newly added
RAS
Newly added
• When the PCC is enabled (P0USE bit in
PCC0GCR set to 1), PCC0WAIT functions
as a WAIT signal in the same manner as
WAIT.
Figure 30.3
between the memory space of the SH7727
and the memory and I/O spaces of the PC
card in the continuous 16-MB area mode.
Although memory space and I/O space are
supported in area 6.
Rev.6.00 Mar. 27, 2009 Page xiii of lvi
USB Host Controller (USBH)
Revised Version
shows the relationship
REJ09B0254-0600
,