UPD78F0513AMC-GAA-AX Renesas Electronics America, UPD78F0513AMC-GAA-AX Datasheet - Page 381

• Manufacturer Part Number: UPD78F0513AMC-GAA-AX
• Description: MCU 8BIT 38PIN SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AMC-GAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
<1> The count operation is enabled by setting TMHEn = 1. Start the 8-bit timer counter Hn by masking one count
<2> The CMP1n register value can be changed during timer counter operation. This operation is asynchronous to the
<3> When the values of the 8-bit timer counter Hn and the CMP0n register match, the value of the 8-bit timer counter
<4> If the CMP1n register value is changed, the value is latched and not transferred to the register. When the values
<5> When the values of the 8-bit timer counter Hn and the CMP1n register after the change match, an inactive level is
<6> Clearing the TMHEn bit to 0 during timer Hn operation sets the INTTMHn signal to the default and PWM output to
(TOLEV1 = 0)
Count clock
counter Hn
8-bit timer
INTTMH1
clock to count up. At this time, PWM output outputs an inactive level.
count clock.
Hn is cleared, an active level is output, and the INTTMHn signal is output.
of the 8-bit timer counter Hn and the CMP1n register before the change match, the value is transferred to the
CMP1n register and the CMP1n register value is changed (<2>’).
However, three count clocks or more are required from when the CMP1n register value is changed to when the
value is transferred to the register. If a match signal is generated within three count clocks, the changed value
cannot be transferred to the register.
output. The 8-bit timer counter Hn is not cleared and the INTTMHn signal is not generated.
an inactive level.
Remark n = 0, 1
CMP01
CMP11
TMHE1
TOH1
00H 01H 02H
<1>
(e) Operation by changing CMP1n (CMP1n = 02H → 03H, CMP0n = A5H)
02H
Figure 9-12. Operation Timing in PWM Output Mode (4/4)
80H
<2>
A5H 00H 01H 02H 03H
02H (03H)
<3>
<2>’
<4>
A5H
03H
CHAPTER 9 8-BIT TIMERS H0 AND H1
A5H 00H 01H 02H 03H
<5>
A5H 00H
<6>
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