UPD78F0513AMC-GAA-AX Renesas Electronics America, UPD78F0513AMC-GAA-AX Datasheet - Page 961

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UPD78F0513AMC-GAA-AX

Manufacturer Part Number
UPD78F0513AMC-GAA-AX
Description
MCU 8BIT 38PIN SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0513AMC-GAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0513AMC-GAA-AX
Manufacturer:
RENESAS
Quantity:
8 000
Part Number:
UPD78F0513AMC-GAA-AX
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Serial
interface
UART6
Function
ASICL6:
Asynchronous serial
interface control
register 6
POWER6, TXE6,
RXE6: Bits 7, 6, 5 of
ASIM6
UART mode
Parity types and
operation
Continuous
transmission
Normal reception
Error of baud rate
Permissible baud
rate range during
reception
Details of Function
The read value of the SBRT6 bit is always 0. SBRT6 is automatically cleared to 0
after SBF reception has been correctly completed.
Before setting the SBTT6 bit to 1, make sure that bit 7 (POWER6) and bit 6 (TXE6) of
ASIM6 = 1. After setting the SBTT6 bit to 1, do not clear it to 0 before SBF
transmission is completed (before an interrupt request signal is generated).
The read value of the SBTT6 bit is always 0. SBTT6 is automatically cleared to 0 at
the end of SBF transmission
Do not set the SBRT6 bit to 1 during reception, and do not set the SBTT6 bit to 1
during transmission.
When the TXDLV6 bit is set to 1 (inverted TxD6 output), the TxD6/SCLA0/P60 pin
cannot be used as a general-purpose port, regardless of the settings of POWER6 and
TXE6. When using the TxD6/SCLA0/P60 pin as a general-purpose port, clear the
TXDLV6 bit to 0 (normal TxD6 output).
Before rewriting the DIR6 and TXDLV6 bits, clear the TXE6 and RXE6 bits to 0.
Clear POWER6 to 0 after clearing TXE6 and RXE6 to 0 to stop the operation.
To start the communication, set POWER6 to 1, and then set TXE6 or RXE6 to 1.
Take relationship with the other party of communication when setting the port mode
register and port register.
Fix the PS61 and PS60 bits to 0 when the device is used in LIN communication
operation.
The TXBF6 and TXSF6 flags of the ASIF6 register change from “10” to “11”, and to
“01” during continuous transmission. To check the status, therefore, do not use a
combination of the TXBF6 and TXSF6 flags for judgment. Read only the TXBF6 flag
when executing continuous transmission.
When the device is use in LIN communication operation, the continuous transmission
function cannot be used. Make sure that asynchronous serial interface transmission
status register 6 (ASIF6) is 00H before writing transmit data to transmit buffer register
6 (TXB6).
To transmit data continuously, write the first transmit data (first byte) to the TXB6
register. Be sure to check that the TXBF6 flag is “0”. If so, write the next transmit
data (second byte) to the TXB6 register. If data is written to the TXB6 register while
the TXBF6 flag is “1”, the transmit data cannot be guaranteed.
To initialize the transmission unit upon completion of continuous transmission, be
sure to check that the TXSF6 flag is “0” after generation of the transmission
completion interrupt, and then execute initialization. If initialization is executed while
the TXSF6 flag is “1”, the transmit data cannot be guaranteed.
During continuous transmission, the next transmission may complete before
execution of INTST6 interrupt servicing after transmission of one data frame. As a
countermeasure, detection can be performed by developing a program that can count
the number of transmit data and by referencing the TXSF6 flag.
If a reception error occurs, read ASIS6 and then RXB6 to clear the error flag.
Otherwise, an overrun error will occur when the next data is received, and the
reception error status will persist.
Reception is always performed with the “number of stop bits = 1”. The second stop
bit is ignored.
Be sure to read asynchronous serial interface reception error status register 6
(ASIS6) before reading RXB6.
Keep the baud rate error during transmission to within the permissible error range at
the reception destination.
Make sure that the baud rate error during reception satisfies the range shown in (4)
Permissible baud rate range during reception.
Make sure that the baud rate error during reception is within the permissible error
range, by using the calculation expression shown below.
Cautions
APPENDIX D LIST OF CAUTIONS
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