UPD78F0513AMC-GAA-AX Renesas Electronics America, UPD78F0513AMC-GAA-AX Datasheet - Page 450

• Manufacturer Part Number: UPD78F0513AMC-GAA-AX
• Description: MCU 8BIT 38PIN SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0513AMC-GAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(2) Error of baud rate
(3) Example of setting baud rate
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
115200
153600
312500
625000
10400
19200
24000
31250
33600
38400
56000
62500
76800
Baud
4800
9600
Rate
[bps]
Remark TPS01, TPS00: Bits 7 and 6 of baud rate generator control register 0 (BRGC0) (setting of base clock
The baud rate error can be calculated by the following expression.
• Error (%) =
Cautions 1. Keep the baud rate error during transmission to within the permissible error range at the
Example: Frequency of base clock = 2.5 MHz = 2,500,000 Hz
TPS01,
TPS00
2H
2H
2H
1H
1H
1H
1H
1H
1H
1H
−
−
−
−
−
k:
f
ERR:
PRS
f
2. Make sure that the baud rate error during reception satisfies the range shown in (4) Permissible
PRS
Set value of MDL04 to MDL00 bits of BRGC0 register = 10000B (k = 16)
Target baud rate = 76,800 bps
Baud rate = 2.5 M/(2 × 16)
Error = (78,125/76,800 − 1) × 100
26
13
12
26
21
16
15
13
:
k
9
8
−
−
−
−
−
= 2.0 MHz
reception destination.
baud rate range during reception.
Actual baud rate (baud rate with error)
Desired baud rate (correct baud rate)
Calculated
10417
19231
23810
31250
33333
38462
55556
62500
= 1.725 [%]
Value
4808
9615
−
−
−
−
−
= 2,500,000/(2 × 16) = 78,125 [bps]
−0.79
−0.79
−0.79
ERR
0.16
0.16
0.16
0.16
0.16
[%]
Value set by the MDL04 to MDL00 bits of BRGC0 (k = 8, 9, 10, ..., 31)
Baud rate error
(f
Peripheral hardware clock frequency
0
0
−
−
−
−
−
XCLK0
TPS01,
TPS00
))
Table 14-5. Set Data of Baud Rate Generator
3H
2H
2H
2H
2H
2H
2H
1H
1H
1H
1H
3H
1H
−
−
f
PRS
16
30
16
13
10
22
20
16
11
k
8
9
8
8
−
−
= 5.0 MHz
Calculated
113636 −1.36
156250
10417
19531
24038
31250
34722
39063
56818
62500
78125
Value
4883
9766
−
−
ERR
1.73
1.73
0.16
1.73
0.16
3.34
1.73
1.46
1.73
1.73
[%]
− 1 × 100 [%]
0
0
−
−
TPS01,
TPS00
3H
3H
3H
2H
2H
2H
2H
2H
2H
2H
1H
1H
1H
−
−
f
CHAPTER 14 SERIAL INTERFACE UART0
PRS
16
15
26
20
19
16
11
10
22
16
k
−
8
8
8
−
= 10.0 MHz
Calculated
113636 −1.36
156250
312500
10417
19531
24038
31250
32895
39063
56818
62500
78125
Value
9766
−
−
ERR
1.73
0.16
1.73
0.16
−2.1
1.73
1.46
1.73
1.73
[%]
−
0
0
0
−
TPS01,
TPS00
3H
3H
3H
3H
3H
3H
2H
2H
2H
2H
2H
1H
1H
−
−
f
PRS
30
16
13
10
22
20
16
11
16
k
−
−
9
8
8
8
= 20.0 MHz
Calculated
113636 −1.36
156250
312500
625000
10417
19531
24038
31250
34722
39063
56818
62500
78125
Value
−
−
ERR
0.16
1.73
0.16
3.34
1.73
1.46
1.73
1.73
[%]
−
−
0
0
0
0
450