UPD78F1211MC-GAA-AX Renesas Electronics America, UPD78F1211MC-GAA-AX Datasheet - Page 161

• Manufacturer Part Number: UPD78F1211MC-GAA-AX
• Description: MCU 16BIT 78K0R/LX3 38-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211MC-GAA-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4.2.4 Port 3
mode register 3 (PM3). When the P30 to P33 pins are used as an input port, use of an on-chip pull-up resistor can be
specified in 1-bit units by pull-up resistor option register 3 (PU3).
using port input mode register 3 (PIM3).
port output mode register 3 (POM3).
P30/SO10/TxD1
/TO11
P31/SI10/RxD1/
SDA10/INTP1/
TI09
P32/SCK10/
SCL10/INTP2
P33
Port 3 is I/O port with an output latch. Port 3 can be set to the input mode or output mode in 1-bit units using port
Input to the P31 and P32 pins can be specified through a normal input buffer or a TTL input buffer in 1-bit units
Output from the P30 to P32 pins can be specified as N-ch open-drain output (V
This port can also be used for serial interface data I/O, clock I/O, external interrupt request input, and timer I/O.
Reset signal generation sets port 3 to input mode.
Figures 4-5 to 4-7 show block diagrams of port 3.
Note
Cautions 1. To use P30/SO10/TxD1/TO11 as a general-purpose port, set bit 1 (TO11) of timer output
TI09 is shared with P17, in the 78K0R/IE3.
2. To use P30/SO10/TxD1/TO11, P31/SI10/RxD1/SDA10/INTP1/TI09, (P31/SI10/RxD1/SDA10/INTP1,
in case of 78K0R/IE3), P32/SCK10/SCL10/INTP2 as a general-purpose port, note the serial
array unit setting. For details, refer to the following tables.
register 1 (TO1) and bit 1 (TOE11) of timer output enable register 1 (TOE1) to “0”, which is
the same as their default status setting.
•
•
78K0R/IB3
Table 13-11 Relationship Between Register Settings and Pins (Channel 2: CSI10,
UART1 Transmission, IIC10)
Table 13-12 Relationship Between Register Settings and Pins (Channel 3: UART1
Reception).
−
√
√
√
(38-pin)
−
√
√
√
CHAPTER 4 PORT FUNCTIONS
User’s Manual U19678EJ1V1UD
78K0R/IC3
(44-pin)
−
√
√
√
(48-pin)
−
√
√
√
DD
78K0R/ID3
tolerance) in 1-bit units using
−
√
√
√
SDA10/INTP1
P31/SI10/RxD1/
78K0R/IE3
√
√
√
Note
159