UPD78F1211MC-GAA-AX Renesas Electronics America, UPD78F1211MC-GAA-AX Datasheet - Page 801

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UPD78F1211MC-GAA-AX

Manufacturer Part Number
UPD78F1211MC-GAA-AX
Description
MCU 16BIT 78K0R/LX3 38-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1211MC-GAA-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
27
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
CHAPTER 14 SERIAL INTERFACE IICA
(2) When communication reservation function is disabled (bit 0 (IICRSV) of IICA flag register (IICF) = 1)
When bit 1 (STT) of IICA control register 0 (IICCTL0) is set to 1 when the bus is not used in a communication
during bus communication, this request is rejected and a start condition is not generated. The following two
statuses are included in the status where bus is not used.
• When arbitration results in neither master nor slave operation
• When an extension code is received and slave operation is disabled (ACK is not returned and the bus was
released by setting bit 6 (LREL) of IICCTL0 to 1 and saving communication)
To confirm whether the start condition was generated or request was rejected, check STCF (bit 7 of IICF). It
takes up to 5 clocks until STCF is set to 1 after setting STT = 1. Therefore, secure the time by software.
799
User’s Manual U19678EJ1V1UD

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