UPD78F1211MC-GAA-AX Renesas Electronics America, UPD78F1211MC-GAA-AX Datasheet - Page 608

• Manufacturer Part Number: UPD78F1211MC-GAA-AX
• Description: MCU 16BIT 78K0R/LX3 38-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211MC-GAA-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 27
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

13.1.3 Simplified I
(SCL) and serial data (SDA). This simplified I
flash memory, or A/D converter, and therefore, it functions only as a master.
stop conditions are observed.
606
This is a clocked communication function to communicate with two or more devices by using two lines: serial clock
Make sure by using software, as well as operating the control registers, that the AC specifications of the start and
For details about the settings, see 13.7 Operation of Simplified I
[Data transmission/reception]
[Interrupt function]
[Error detection flag]
* [Functions not supported by simplified I
Note When receiving the last data, ACK will not be output if 0 is written to the SOE02 bit (serial output enable
Remark
• Master transmission, master reception (only master function with a single master)
• ACK output function
• Data length of 8 bits (When an address is transmitted, the address is specified by the higher 7 bits, and the
• Manual generation of start condition and stop condition
• Transfer end interrupt
• Parity error (ACK error)
• Slave transmission, slave reception
• Arbitration loss detection function
• Wait detection functions
least significant bit is used for R/W control.)
register 0 (SOE0)) bit and serial communication data output is stopped. See the processing flow in 13.7.3
(2) for details.
To use an I
78K0R/IC3, 78K0R/ID3 and 78K0R/IE3 only).
2
C (IIC10)
2
C bus of full function, see CHAPTER 14 SERIAL INTERFACE IICA (48-pin products of
Note
and ACK detection function
CHAPTER 13 SERIAL ARRAY UNIT
2
C]
2
User’s Manual U19678EJ1V1UD
C is designed for single communication with a device such as EEPROM,
2
C (IIC10)