MCF5307FT90B Freescale Semiconductor, MCF5307FT90B Datasheet - Page 129

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MCF5307FT90B

Manufacturer Part Number
MCF5307FT90B
Description
IC MPU 32BIT COLDF 90MHZ 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets

Specifications of MCF5307FT90B

Core Processor
Coldfire V3
Core Size
32-Bit
Speed
90MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Chapter 5
Debug Support
This chapter describes the Revision B enhanced hardware debug support in the MC5307.
This revision of the ColdFire debug architecture encompasses the earlier revision.
5.1 Overview
The debug module is shown in Figure 5-1.
Debug support is divided into three areas:
• Real-time trace support—The ability to determine the dynamic execution path
• Background debug mode (BDM)—Provides low-level debugging in the ColdFire
• Real-time debug support—BDM requires the processor to be halted, which many
through an application is fundamental for debugging. The ColdFire solution
implements an 8-bit parallel output bus that reports processor execution status and
data to an external emulator system. See Section 5.3, “Real-Time Trace Support.”
processor complex. In BDM, the processor complex is halted and a variety of
commands can be sent to the processor to access memory and registers. The external
emulator uses a three-pin, serial, full-duplex channel. See Section 5.5, “Background
Debug Mode (BDM),” and Section 5.4, “Programming Model.”
real-time embedded applications cannot do. Debug interrupts let real-time systems
execute a unique service routine that can quickly save the contents of key registers
and variables and return the system to normal operation. The emulator can access
saved data because the hardware supports concurrent operation of the processor and
BDM-initiated commands. See Section 5.6, “Real-Time Debug Support.”
Control
BKPT
Figure 5-1. Processor/Debug Module Interface
Freescale Semiconductor, Inc.
For More Information On This Product,
PST[3:0], DDATA[3:0]
ColdFire CPU Core
Debug Module
Trace Port
PSTCLK
Chapter 5. Debug Support
Go to: www.freescale.com
Communication Port
DSCLK, DSI, DSO
High-speed
local bus
5-1

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