AT91SAM7S64C-AU Atmel, AT91SAM7S64C-AU Datasheet - Page 187

• Manufacturer Part Number: AT91SAM7S64C-AU
• Description: IC ARM7 MCU 32BIT 64K 64LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S64C-AU

• Package / Case: 64-LQFP
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 55MHz
• Number Of I /o: 32
• Core Processor: ARM7
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Core Size: 16/32-Bit
• Core: ARM7TDMI
• Package: 64LQFP
• Device Core: ARM7TDMI
• Family Name: AT91
• Maximum Speed: 55 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 32
• Interface Type: SPI/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7S64B-AU::AT91SAM7S64B-AU

24. Clock Generator
24.1
24.2
24.3
24.3.1
6175K–ATARM–30-Aug-10
Overview
Slow Clock RC Oscillator
Main Oscillator
Main Oscillator Connections
The Clock Generator is made up of 1 PLL, a Main Oscillator, as well as an RC Oscillator.
It provides the following clocks:
The Clock Generator User Interface is embedded within the Power Management Controller one
and is described in
The user has to take into account the possible drifts of the RC Oscillator. More details are given
in the section “DC Characteristics” of the product datasheet.
Figure 24-1
Figure 24-1. Main Oscillator Block Diagram
The Clock Generator integrates a Main Oscillator that is designed for a 3 to 20 MHz fundamental
crystal. The typical crystal connection is illustrated in
trical characteristics of the Main Oscillator, see the section “DC Characteristics” of the product
datasheet.
• SLCK, the Slow Clock, which is the only permanent clock within the system
• MAINCK is the output of the Main Oscillator
• PLLCK is the output of the Divider and PLL block
shows the Main Oscillator block diagram.
Slow Clock
Section
XOUT
SLCK
XIN
25.9. However, the Clock Generator registers are named CKGR_.
AT91SAM7S Series Preliminary
Main Clock
OSCOUNT
Frequency
Oscillator
MOSCEN
Oscillator
Counter
Counter
Main
Main
Figure
24-2. For further details on the elec-
Main Clock
MAINCK
MAINRDY
MOSCS
MAINF
187