AT91SAM7S64C-AU Atmel, AT91SAM7S64C-AU Datasheet - Page 535

• Manufacturer Part Number: AT91SAM7S64C-AU
• Description: IC ARM7 MCU 32BIT 64K 64LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S64C-AU

• Package / Case: 64-LQFP
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 55MHz
• Number Of I /o: 32
• Core Processor: ARM7
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Core Size: 16/32-Bit
• Core: ARM7TDMI
• Package: 64LQFP
• Device Core: ARM7TDMI
• Family Name: AT91
• Maximum Speed: 55 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 32
• Interface Type: SPI/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7S64B-AU::AT91SAM7S64B-AU

36. Analog-to-Digital Converter (ADC)
36.1
36.2
Figure 36-1. Analog-to-Digital Converter Block Diagram
6175K–ATARM–30-Aug-10
Overview
Block Diagram
Analog Inputs
with I/O lines
Multiplexed
Dedicated
Analog
Inputs
ADVREF
ADTRG
VDDIN
AD-
AD-
AD-
AD-
AD-
AD-
GND
The ADC is based on a Successive Approximation Register (SAR) 10-bit Analog-to-Digital Con-
verter (ADC). It also integrates an 8-to-1 analog multiplexer, making possible the analog-to-
digital conversions of 8 analog lines. The conversions extend from 0V to ADVREF.
The ADC supports an 8-bit or 10-bit resolution mode, and conversion results are reported in a
common register for all channels, as well as in a channel-dedicated register. Software trigger,
external trigger on rising edge of the ADTRG pin or internal triggers from Timer Counter out-
put(s) are configurable.
The ADC also integrates a Sleep Mode and a conversion sequencer and connects with a PDC
channel. These features reduce both power consumption and processor intervention.
Finally, the user can configure ADC timings, such as Startup Time and Sample & Hold Time.
PIO
Selection
Channels
Trigger
Counter
Timer
Analog-to-Digital
Approximation
ADC cell
Successive
Converter
Register
ADC Controller
AT91SAM7S Series Preliminary
Interface
Control
PMC
Logic
User
MCK
ADC Interrupt
PDC
AIC
Peripheral Bridge
ASB
APB
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