AT91SAM7S64C-AU Atmel, AT91SAM7S64C-AU Datasheet - Page 368

• Manufacturer Part Number: AT91SAM7S64C-AU
• Description: IC ARM7 MCU 32BIT 64K 64LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S64C-AU

• Package / Case: 64-LQFP
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Speed: 55MHz
• Number Of I /o: 32
• Core Processor: ARM7
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Core Size: 16/32-Bit
• Core: ARM7TDMI
• Package: 64LQFP
• Device Core: ARM7TDMI
• Family Name: AT91
• Maximum Speed: 55 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 32
• Interface Type: SPI/TWI/USART/USB
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7S64B-AU::AT91SAM7S64B-AU

31.6.3.4
368
AT91SAM7S Series Preliminary
Receiver Operations
OVRE
XRDY
_RHR
S_CR
Clock
Read
Write
Figure 31-12. Synchronous Mode Character Reception
When a character reception is completed, it is transferred to the Receive Holding Register
(US_RHR) and the RXRDY bit in the Status Register (US_CSR) rises. If a character is com-
pleted while the RXRDY is set, the OVRE (Overrun Error) bit is set. The last character is
transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing
the Control Register (US_CR) with the RSTSTA (Reset Status) bit at 1.
Figure 31-13. Receiver Status
Rate
RXD
Example: 8-bit, Parity Enabled 1 Stop
Baud Rate
Sampling
Start
Clock
RXD
Bit
D0
D1
Start
D2
D3
D4
D0
D5
D6
D1
D7
Parity
Bit
D2
Stop
Bit
Start
D3
Bit
D0
D4
D1
D2
D5
D3
D4
D6
D5
D6
D7
D7
Parity
6175K–ATARM–30-Aug-10
Bit
Parity Bit
Stop
Bit
RSTSTA = 1
Stop Bit