XR17V358IB176-F Exar Corporation, XR17V358IB176-F Datasheet - Page 33
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XR17V358IB176-F
Manufacturer Part Number
XR17V358IB176-F
Description
IC UART PCIE OCTAL 176FPBGA
Manufacturer
Exar Corporation
Datasheet
1.XR17V358IB176-F.pdf
(68 pages)
Specifications of XR17V358IB176-F
Number Of Channels
1, UART
Package / Case
176-LFBGA
Features
*
Fifo's
256 Byte
Protocol
RS485
Voltage - Supply
1.2V, 3.3V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Data Rate
25 Mbps
Supply Current
120 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
No. Of Channels
8
Uart Features
Tx/Rx FIFO Counters
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
BGA
No. Of Pins
176
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
1016-1296 - EVAL BOARD FOR XR17V358-E81016-1295 - EVAL BOARD FOR XR17V358-E41016-1293 - EVAL BOARD FOR XR17V358
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
1016-1294
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XR17V358IB176-F
Manufacturer:
EXAR
Quantity:
1 700
Company:
Part Number:
XR17V358IB176-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XR17V358IB176-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
REV. 1.0.2
The THR and RHR register address for channel 0 to channel 7 is shown in
for each channel 0 to 7 are located sequentially at address 0x0000, 0x0200, 0x0400, 0x0600, 0x0800,
0x0A000, 0x0C00 and 0x0E00. Transmit data byte is loaded to the THR when writing to that address and
receive data is unloaded from the RHR register when reading that address. Both THR and RHR registers are
16C550 compatible in 8-bit format, so each bus operation can only write or read in bytes.
2.2
Data Bit-31
PCI Bus
B7 B6 B5 B4 B3 B2 B1 B0
FIFO DATA LOADING AND UNLOADING THROUGH THE UART CHANNEL REGISTERS, THR
AND RHR IN 8-BIT FORMAT
Transmit Data Byte n+3
T
ABLE
C H3 0x0C 00 W rite TH R
C H3 0x0C 00 R ead R H R
C H0 0x0000 R ead R H R
C H2 0x0800 R ead R H R
C H4 0x1000 R ead R H R
C H5 0x1400 W rite TH R
C H0 0x0000 W rite TH R
C H1 0x0400 W rite TH R
C H1 0x0400 R ead R H R
C H2 0x0800 W rite TH R
C H4 0x1000 W rite TH R
C H7 0x1C 00 R ead R H R
C H5 0x1400 R ead R H R
C H6 0x1800 R ead R H R
C H7 0x1C00 W rite TH R
C H6 0x1800 W rite TH R
10: T
RANSMIT AND
Channel 0 to 7 Transmit Data in 32-bit alignment through the Configuration Register Address
TH R and R H R Address Locations For C H0 to C H7 (16C 550 C om patible)
B7 B6 B5 B4 B3 B2 B1 B0
0x0100, 0x0500, 0x0900, 0x0D00, 0x1100, 0x1500, 0x1900 and 0x1D00
Transmit Data Byte n+2
R
ECEIVE
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
Bit-7
D
ATA
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
Bit-6
R
EGISTER IN
33
HIGH PERFORMANCE OCTAL PCI EXPRESS UART
B it-5
B it-5
B it-5
B it-5
B it-5
B it-5
B it-5
B it-5
B it-5
B it-5
B it-5
B it-5
B it-5
B it-5
B it-5
B it-5
B7 B6 B5 B4 B3 B2 B1 B0
Transmit Data Byte n+1
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
Bit-4
B
YTE FORMAT
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Bit-3
Table 10
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
Bit-2
, 16C550
B7 B6 B5 B4 B3 B2 B1 B0
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
Bit-1
below. The THR and RHR
COMPATIBLE
Transmit Data Byte n+0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
Bit-0
XR17V358
Data Bit-0
PCI Bus