AD9869-EBZ Analog Devices Inc, AD9869-EBZ Datasheet - Page 2

• Manufacturer Part Number: AD9869-EBZ
• Description: BOARD EVAL FOR AD9869
• Manufacturer: Analog Devices Inc
• Type: ADC + DAC, Codec, Front End for RFr

Specifications of AD9869-EBZ

• Contents: Board
• For Use With/related Products: AD9869
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9869
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 9
Pin Configuration and Function Descriptions........................... 10
Serial Port ........................................................................................ 12
Digital Interface .............................................................................. 16
REVISION HISTORY
5/07—Revision 0: Initial Version
Tx Path Specifications.................................................................. 3
Rx Path Specifications.................................................................. 4
Power Supply Specifications........................................................ 6
Digital Specifications ................................................................... 7
Serial Port Timing Specifications............................................... 7
Half-Duplex Data Interface (ADIO Port) Timing
Specifications ................................................................................ 8
Full-Duplex Data Interface (Tx and Rx Port) Timing
Specifications ................................................................................ 8
Thermal Characteristics .............................................................. 9
Explanation of Test Levels ........................................................... 9
ESD Caution.................................................................................. 9
Register Map Description.......................................................... 14
Serial Port Interface (SPI).......................................................... 14
Half-Duplex Mode ..................................................................... 16
Rev. 0 | Page 2 of 36
Transmit Path.................................................................................. 21
Receive Path .................................................................................... 24
Clock Synthesizer ........................................................................... 28
Power Control and Dissipation .................................................... 30
Outline Dimensions ....................................................................... 35
Full-Duplex Mode ...................................................................... 17
RxPGA Control .......................................................................... 19
TxPGA Control .......................................................................... 20
Digital Interpolation Filters ...................................................... 21
TxDAC and IAMP Architecture .............................................. 22
Tx Programmable Gain Control .............................................. 23
TxDAC Output Operation........................................................ 23
IAMP Current-Mode Operation.............................................. 23
Rx Programmable Gain Amplifier........................................... 24
Low-Pass Filter............................................................................ 25
Analog-to-Digital Converter (ADC)....................................... 26
AGC Timing Considerations.................................................... 27
Power-Down ............................................................................... 30
Half-Duplex Power Savings ...................................................... 30
Power Reduction Options ......................................................... 31
Power Dissipation....................................................................... 33
Mode Select upon Power-Up and Reset.................................. 33
Analog and Digital Loopback Test Modes.............................. 34
Ordering Guide .......................................................................... 35