AD9869-EBZ Analog Devices Inc, AD9869-EBZ Datasheet - Page 21

• Manufacturer Part Number: AD9869-EBZ
• Description: BOARD EVAL FOR AD9869
• Manufacturer: Analog Devices Inc
• Type: ADC + DAC, Codec, Front End for RFr

Specifications of AD9869-EBZ

• Contents: Board
• For Use With/related Products: AD9869
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TRANSMIT PATH
The transmit path of the AD9869 (or its related part, the AD9868)
consists of a selectable digital 2×/4× interpolation filter, a 12-bit
(or 10-bit) TxDAC, and a current-output amplifier, IAMP (see
Figure 18). Note that the additional two bits of resolution offered
by the AD9869 result in a 10 dB to 12 dB reduction in the pass-
band noise floor. The digital interpolation filter relaxes the Tx
analog filtering requirements by simultaneously reducing the
images from the DAC reconstruction process while increasing the
analog filter’s transition band. The digital interpolation filter can
also be bypassed, resulting in lower digital current consumption.
ADIO[11:6]/
TXEN/SYNC
DIGITAL INTERPOLATION FILTERS
The input data from the Tx port can be fed into a selectable
2×/4× interpolation filter. The interpolation factor for the
digital filter is set via SPI Register 0x0C with the settings shown
in Table 17. The maximum input word rate, f
interpolation filter is 80 MSPS; the maximum DAC update rate
is 200 MSPS. Therefore, applications with input word rates at or
below 50 MSPS can benefit from 4× interpolation, whereas
applications with input word rates between 50 MSPS and
80 MSPS can benefit from 2× interpolation.
Table 17. Interpolation Factor Set via SPI Register 0x0C
Bits[7:6]
00
01
10
11
The interpolation filter consists of two cascaded half-band filter
stages with each stage providing 2× interpolation. The first
stage filter consists of 43 taps. The second stage filter, operating
at the higher data rate, consists of 11 taps. The normalized
wideband and pass-band filter responses (relative f
2× low-pass interpolation filter and 4× low-pass interpolation
filter are shown in Figure 19 and Figure 20, respectively.
ADIO[5:0]/
Rx[5:0]
Tx[5:0]
TXCLK
Figure 18. Functional Block Diagram of Tx Path
10
Interpolation Factor
4
2
Do not use
Do not use
2-4×
AD9869
0 TO –7.5dB
TxDAC
DATA
0 TO –12dB
, into the
IAMP
DATA
) for the
IOUTN+
IOUTN–
Rev. 0 | Page 21 of 36
These responses also include the inherent sinc(x) from the TxDAC
reconstruction process and can be used to estimate any post
analog filtering requirements.
The pipeline delays of the 2× and 4× filter responses are
21.5 clock cycles and 24 clock cycles, respectively, relative to
f
applications configured for a half-duplex interface with the half-
duplex power-down mode enabled. This feature allows the user
to set a programmable delay that powers down the TxDAC and
IAMP only after the last Tx input sample has propagated
through the digital filter. See the Power Control and Dissipation
section for more details.
DATA
–10
–20
–30
–40
–50
–60
–70
–80
–90
–10
–20
–30
–40
–50
–60
–70
–80
–90
. The filter delay is also taken into consideration for
10
10
0
0
0
0
PASS BAND
Figure 19. Frequency Response of 2× Interpolation Filter
Figure 20. Frequency Response of 4× Interpolation Filter
WIDE BAND
WIDE BAND
0.25
0.5
NORMALIZED FREQUENCY (Relative to
NORMALIZED FREQUENCY (Relative to
PASS BAND
–1.0dB @ 0.45
0.50
1.0
–1.0dB @ 0.441
(Normalized to f
(Normalized to f
0.75
1.5
f
DATA
1.00
2.0
f
1.25
DATA
2.5
DATA
DATA
)
)
1.50
3.0
f
f
DATA
DATA
1.75
)
3.5
)
AD9869
2.00
4.0
2.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5
2.5
2.0
1.5
1.0
0.5
0
–0.5
–1.0
–1.5
–2.0
–2.5