XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 160
XRT94L43IB-F
Manufacturer Part Number
XRT94L43IB-F
Description
IC MAPPER SONET/SDH OC12 516BGA
Manufacturer
Exar Corporation
Datasheet
1.XRT94L43IB.pdf
(328 pages)
Specifications of XRT94L43IB-F
Applications
Network Switches
Interface
Bus
Voltage - Supply
2.5V, 3.3V
Package / Case
516-BBGA
Mounting Type
Surface Mount
Product
Mapper
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L43IB-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XRT94L43IB-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
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REV. 1.0.2
STS-12/STM-4 TELECOM BUS INTERFACE - TRANSMIT DIRECTION
P
K5
IN
#
TxSBFP
S
IGNAL
N
AME
I/O
I
TTL
S
T
IGNAL
YPE
Telecom Bus Sync Reference Input:
If either the STS-12/STM-4 or any of the STS-3/STM-1 Telecom Bus
Interfaces are enabled, then an 8kHz pulse must be applied to this
input pin.
If the STS-12/STM-4 Telecom Bus Interface is enabled:
The Transmit STS-12/STM-4 Telecom Bus Interface will begin trans-
mitting the very first byte of given STS-12 or STM-4 frame, upon sens-
ing a rising edge (of the 8kHz signal) at this input pin.
If any of the STS-3/STM-1 Telecom Bus Interfaces are enabled:
The Receive STS-3/STM-1 Telecom Bus Interfaces will begin transmit-
ting the very first byte of a given STS-3 or STM-1 frame, upon sensing
a rising edge (of the 8kHz signal) at this input pin.
N
N
OTE
OTES
1. 1.If this input pin is tied to GND, then the Transmit STS-12
2. This input signal must be synchronized with the signal that is
3. An 8kHz pulse must be applied to this input pin, that has a
: If none of the Telecom Bus Interfaces are used, then this pin
:
should be tied to GND.
154
TOH Processor block will generate its outbound STS-12/
STM-4 frames asynchronously with respect to any input
signal.
supplied to the REFCLK input pin. Failure to insure this will
result in bit errors being generated within the outbound STS-
12/STM-4 signal.
width of approximately 12.8ns (one 77.76MHz clock period).
Do not apply a 50% duty cycle 8kHz signal to this input pin.
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
D
ESCRIPTION
XRT94L43
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