XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 64

• Manufacturer Part Number: XRT94L43IB-F
• Description: IC MAPPER SONET/SDH OC12 516BGA
• Manufacturer: Exar Corporation

Specifications of XRT94L43IB-F

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 2.5V, 3.3V
• Package / Case: 516-BBGA
• Mounting Type: Surface Mount
• Product: Mapper
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.2
STS-3/STM-1 TELECOM BUS INTERFACE - TRANSMIT DIRECTION
P
E26
IN
#
STS3TxA_D_1_2
TxSBDATA_2
DS3/E3/
STS1_DATA_IN_1
S
IGNAL
N
AME
I/O
I
S
T
IGNAL
TTL
YPE
Transmit STS-3/STM-1 Telecom Bus - Channel 1 - Input Data Bus
Pin Number 2/DS3/E3 Framer or Receive STS-1 TOH Processor
block line interface input Pin - Channel 1:
The function of this pin depends upon whether or not the STS-3/
STM-1 Telecom Bus Interface, associated with Channel 1 is enabled.
If STS-3/STM-1 Telecom Bus (Channel 1) has been enabled -
STS-3/STM-1 Transmit Telecom Bus - Input Data Bus Pin Num-
ber 2: STS3TxA_D_1_2:
STS3TxA_D_1[1:0] function as the STS-3/STM-1 Transmit (Add)
Telecom Bus - Input Data Bus for Channel 1. The STS-3/STM-1 Tele-
com Bus interface will sample and latch this pin upon the falling edge
of STS3TxA_CLK_1.
If STS-3/STM-1 Telecom Bus (Channel 1) is disabled - DS3/E3/
STS1_DATA_IN - DS3/E3/STS-1 Line Interface Data Input - Chan-
nel 1:
This input accepts single-rail, recovered DS3, E3 or STS-1 data
(from a DS3/E3/STS-1 LIU IC). This input pin should be connected to
the RPOS output of the DS3/E3/STS-1 LIU IC (corresponding to
channel 1).
By default, the data that is applied to this input pin will be latched into
the XRT94L43 upon the falling edge of the DS3/E3/STS1_CLK_IN_1
signal pin number D26.
For DS3/E3 Applications
The XRT94L43 can be configured to latch this input signal upon the
rising edge of the DS3/E3/STS1_CLK_IN_1 signal by setting Bit 1
(DS3/E3/STS1_CLK_IN Invert), within the I/O Control Register -
Channel 1 (Indirect Address = 0x2E, 0x01), (Direct Address =
0x2F01) to a "1".
For STS-1 Applications
The XRT94L43 can not be configured to sample the DS3/E3/
STS1_DATA_IN_1 signal upon the rising edge of DS3/E3/
STS1_CLK_IN_1.
This input pin along with STS3TxA_D_1[7:3] and
58
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
D
ESCRIPTION
XRT94L43